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authorAleksandar Beserminji <Aleksandar.Beserminji@imgtec.com>2017-09-29 10:52:03 +0000
committerAleksandar Beserminji <Aleksandar.Beserminji@imgtec.com>2017-09-29 10:52:03 +0000
commita0a01e7172ecc7bb00da42013254fde760a45f59 (patch)
tree9da6105feda8101dbca6391de041c18ea00802ee /llvm/test/CodeGen
parentf21d8d6ad535c944f3c0169cc2bcae55db3927de (diff)
downloadbcm5719-llvm-a0a01e7172ecc7bb00da42013254fde760a45f59.tar.gz
bcm5719-llvm-a0a01e7172ecc7bb00da42013254fde760a45f59.zip
Revert "[mips] Reordering callseq* nodes to be linear"
Added test relies on the compiler being built in debug mode, which may not be the case. This reverts commit r314497. llvm-svn: 314506
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/Mips/callseq_order.ll55
-rw-r--r--llvm/test/CodeGen/Mips/largeimmprinting.ll11
-rw-r--r--llvm/test/CodeGen/Mips/llvm-ir/mul.ll2
-rw-r--r--llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll2
-rw-r--r--llvm/test/CodeGen/Mips/llvm-ir/srem.ll2
-rw-r--r--llvm/test/CodeGen/Mips/llvm-ir/udiv.ll2
-rw-r--r--llvm/test/CodeGen/Mips/llvm-ir/urem.ll2
7 files changed, 10 insertions, 66 deletions
diff --git a/llvm/test/CodeGen/Mips/callseq_order.ll b/llvm/test/CodeGen/Mips/callseq_order.ll
index 0da511ac714..e69de29bb2d 100644
--- a/llvm/test/CodeGen/Mips/callseq_order.ll
+++ b/llvm/test/CodeGen/Mips/callseq_order.ll
@@ -1,55 +0,0 @@
-; RUN: llc -mtriple=mipsel-linux-gnu -o /dev/null \
-; RUN: -verify-machineinstrs -stop-before=expand-isel-pseudos \
-; RUN: -debug-only=isel %s 2>&1 | FileCheck %s
-; RUN: llc -mtriple=mips64el-linux-gnu -o /dev/null \
-; RUN: -verify-machineinstrs -stop-before=expand-isel-pseudos \
-; RUN: -debug-only=isel %s 2>&1 | FileCheck %s
-; RUN: llc -mtriple=mips-linux-gnu -o /dev/null \
-; RUN: -verify-machineinstrs -stop-before=expand-isel-pseudos \
-; RUN: -debug-only=isel %s 2>&1 | FileCheck %s
-; RUN: llc -mtriple=mips64-linux-gnu -o /dev/null \
-; RUN: -verify-machineinstrs -stop-before=expand-isel-pseudos \
-; RUN: -debug-only=isel %s 2>&1 | FileCheck %s
-
-
-%struct.Str1 = type { [64 x i32] }
-
-@s1 = common global %struct.Str1 zeroinitializer, align 4
-
-define void @foo1() {
-entry:
- call void @bar1(%struct.Str1* byval align 4 @s1)
- ret void
- ; CHECK-LABEL: *** MachineFunction at end of ISel ***
- ; CHECK-LABEL: # Machine code for function foo1: IsSSA, TracksLiveness
- ; CHECK: ADJCALLSTACKDOWN
- ; CHECK: JAL <es:memcpy>
- ; CHECK: ADJCALLSTACKUP
- ; CHECK: ADJCALLSTACKDOWN
- ; CHECK: JAL <ga:@bar1>
- ; CHECK: ADJCALLSTACKUP
- ; CHECK-LABEL: # End machine code for function foo1.
-}
-
-declare void @bar1(%struct.Str1* byval align 4)
-
-define void @foo2() {
-entry:
- call void @bar2(%struct.Str1* byval align 4 @s1, %struct.Str1* byval align 4 @s1)
- ret void
- ; CHECK-LABEL: *** MachineFunction at end of ISel ***
- ; CHECK-LABEL: # Machine code for function foo2: IsSSA, TracksLiveness
- ; CHECK: ADJCALLSTACKDOWN
- ; CHECK: JAL <es:memcpy>
- ; CHECK: ADJCALLSTACKUP
- ; CHECK: ADJCALLSTACKDOWN
- ; CHECK: JAL <es:memcpy>
- ; CHECK: ADJCALLSTACKUP
- ; CHECK: ADJCALLSTACKDOWN
- ; CHECK: JAL <ga:@bar2>
- ; CHECK: ADJCALLSTACKUP
- ; CHECK-LABEL: # End machine code for function foo2.
-}
-
-declare void @bar2(%struct.Str1* byval align 4, %struct.Str1* byval align 4)
-
diff --git a/llvm/test/CodeGen/Mips/largeimmprinting.ll b/llvm/test/CodeGen/Mips/largeimmprinting.ll
index 2225fc78e52..f27e11425b9 100644
--- a/llvm/test/CodeGen/Mips/largeimmprinting.ll
+++ b/llvm/test/CodeGen/Mips/largeimmprinting.ll
@@ -1,9 +1,8 @@
-; RUN: llc -march=mipsel -relocation-model=pic -verify-machineinstrs < %s | \
-; RUN: FileCheck %s -check-prefix=32
-; RUN: llc -march=mips64el -mcpu=mips4 -target-abi=n64 -relocation-model=pic \
-; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=64
-; RUN: llc -march=mips64el -mcpu=mips64 -target-abi=n64 -relocation-model=pic \
-; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=64
+; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips4 -target-abi=n64 -relocation-model=pic < %s | \
+; RUN: FileCheck %s -check-prefix=64
+; RUN: llc -march=mips64el -mcpu=mips64 -target-abi=n64 -relocation-model=pic < %s | \
+; RUN: FileCheck %s -check-prefix=64
%struct.S1 = type { [65536 x i8] }
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/mul.ll b/llvm/test/CodeGen/Mips/llvm-ir/mul.ll
index e32aa646c04..1562372ce9a 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/mul.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/mul.ll
@@ -268,7 +268,7 @@ entry:
; MM64R6: daddu $2, $[[T1]], $[[T0]]
; MM64R6-DAG: dmul $3, $5, $7
- ; MM32: lw $25, %call16(__multi3)
+ ; MM32: lw $25, %call16(__multi3)($16)
%r = mul i128 %a, %b
ret i128 %r
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll b/llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
index 087b28b3acd..defd25bb41a 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
@@ -190,7 +190,7 @@ entry:
; GP64-NOT-R6: ld $25, %call16(__divti3)($gp)
; 64R6: ld $25, %call16(__divti3)($gp)
- ; MM32: lw $25, %call16(__divti3)
+ ; MM32: lw $25, %call16(__divti3)($16)
; MM64: ld $25, %call16(__divti3)($2)
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/srem.ll b/llvm/test/CodeGen/Mips/llvm-ir/srem.ll
index 7466e5679bb..42664d7457e 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/srem.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/srem.ll
@@ -182,7 +182,7 @@ entry:
; GP64-NOT-R6: ld $25, %call16(__modti3)($gp)
; 64R6: ld $25, %call16(__modti3)($gp)
- ; MM32: lw $25, %call16(__modti3)
+ ; MM32: lw $25, %call16(__modti3)($16)
; MM64: ld $25, %call16(__modti3)($2)
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/udiv.ll b/llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
index 122d1385353..78ab36442a9 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
@@ -152,7 +152,7 @@ entry:
; GP64-NOT-R6: ld $25, %call16(__udivti3)($gp)
; 64-R6: ld $25, %call16(__udivti3)($gp)
- ; MM32: lw $25, %call16(__udivti3)
+ ; MM32: lw $25, %call16(__udivti3)($16)
; MM64: ld $25, %call16(__udivti3)($2)
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/urem.ll b/llvm/test/CodeGen/Mips/llvm-ir/urem.ll
index 7fd3d79f843..160c126c7e3 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/urem.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/urem.ll
@@ -208,7 +208,7 @@ entry:
; GP64-NOT-R6: ld $25, %call16(__umodti3)($gp)
; 64R6: ld $25, %call16(__umodti3)($gp)
- ; MM32: lw $25, %call16(__umodti3)
+ ; MM32: lw $25, %call16(__umodti3)($16)
; MM64: ld $25, %call16(__umodti3)($2)
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