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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-31 11:55:30 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-01-31 11:55:30 +0000 |
| commit | a001008a0940d9d6c1b228763ce8b8e6e04aced1 (patch) | |
| tree | 9e593b4630d356fc99dda71ac179995d07606a65 /llvm/test/CodeGen | |
| parent | 4fda0720fe896e81a78611470551f6a69b3052cc (diff) | |
| download | bcm5719-llvm-a001008a0940d9d6c1b228763ce8b8e6e04aced1.tar.gz bcm5719-llvm-a001008a0940d9d6c1b228763ce8b8e6e04aced1.zip | |
[X86] combineExtractWithShuffle - more aggressively peek through bitcasts
Fixes regression introduced by rL352743
llvm-svn: 352745
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/extractelement-load.ll | 43 |
1 files changed, 14 insertions, 29 deletions
diff --git a/llvm/test/CodeGen/X86/extractelement-load.ll b/llvm/test/CodeGen/X86/extractelement-load.ll index fbebc07aae0..f1d31b83a77 100644 --- a/llvm/test/CodeGen/X86/extractelement-load.ll +++ b/llvm/test/CodeGen/X86/extractelement-load.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=X64-SSSE3 -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX +; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X32-SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=X64,X64-SSSE3 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" @@ -12,15 +12,10 @@ define i32 @t(<2 x i64>* %val) nounwind { ; X32-SSE2-NEXT: movl 8(%eax), %eax ; X32-SSE2-NEXT: retl ; -; X64-SSSE3-LABEL: t: -; X64-SSSE3: # %bb.0: -; X64-SSSE3-NEXT: movl 8(%rdi), %eax -; X64-SSSE3-NEXT: retq -; -; X64-AVX-LABEL: t: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: movl 8(%rdi), %eax -; X64-AVX-NEXT: retq +; X64-LABEL: t: +; X64: # %bb.0: +; X64-NEXT: movl 8(%rdi), %eax +; X64-NEXT: retq %tmp2 = load <2 x i64>, <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1] %tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp3, i32 2 ; <i32> [#uses=1] @@ -34,13 +29,9 @@ define i32 @t2(<8 x i32>* %xp) { ; X32-SSE2: # %bb.0: ; X32-SSE2-NEXT: retl ; -; X64-SSSE3-LABEL: t2: -; X64-SSSE3: # %bb.0: -; X64-SSSE3-NEXT: retq -; -; X64-AVX-LABEL: t2: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: retq +; X64-LABEL: t2: +; X64: # %bb.0: +; X64-NEXT: retq %x = load <8 x i32>, <8 x i32>* %xp %Shuff68 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 undef, i32 7, i32 9, i32 undef, i32 13, i32 15, i32 1, i32 3> %y = extractelement <8 x i32> %Shuff68, i32 0 @@ -91,16 +82,10 @@ define i64 @t4(<2 x double>* %a) { ; X32-SSE2-NEXT: movd %xmm0, %edx ; X32-SSE2-NEXT: retl ; -; X64-SSSE3-LABEL: t4: -; X64-SSSE3: # %bb.0: -; X64-SSSE3-NEXT: movq (%rdi), %rax -; X64-SSSE3-NEXT: retq -; -; X64-AVX-LABEL: t4: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] -; X64-AVX-NEXT: vpextrq $1, %xmm0, %rax -; X64-AVX-NEXT: retq +; X64-LABEL: t4: +; X64: # %bb.0: +; X64-NEXT: movq (%rdi), %rax +; X64-NEXT: retq %b = load <2 x double>, <2 x double>* %a, align 16 %c = shufflevector <2 x double> %b, <2 x double> %b, <2 x i32> <i32 1, i32 0> %d = bitcast <2 x double> %c to <2 x i64> |
