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authorChad Rosier <mcrosier@codeaurora.org>2016-05-12 01:42:01 +0000
committerChad Rosier <mcrosier@codeaurora.org>2016-05-12 01:42:01 +0000
commit9926a5e31de0834d7a70bf1837777b94a72e5111 (patch)
treeab4cd975d577cdb9bb79569fcd2a33c30caacffd /llvm/test/CodeGen
parent8d3b1791ed96c2e6cb80825a2867494d794e6600 (diff)
downloadbcm5719-llvm-9926a5e31de0834d7a70bf1837777b94a72e5111.tar.gz
bcm5719-llvm-9926a5e31de0834d7a70bf1837777b94a72e5111.zip
[AArch64] Add support for unscaled narrow stores in getUsefulBitsForUse.
llvm-svn: 269263
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AArch64/bitfield-insert.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/bitfield-insert.ll b/llvm/test/CodeGen/AArch64/bitfield-insert.ll
index 83aec691195..b89d06be84d 100644
--- a/llvm/test/CodeGen/AArch64/bitfield-insert.ll
+++ b/llvm/test/CodeGen/AArch64/bitfield-insert.ll
@@ -273,3 +273,41 @@ entry:
store i16 %trunc, i16* %ptr16
ret void
}
+
+define void @test_nouseful_sturb(i32* %ptr32, i8* %ptr8, i32 %x) {
+entry:
+; CHECK-LABEL: @test_nouseful_sturb
+; CHECK: ldr [[REG1:w[0-9]+]],
+; CHECK-NOT: and {{w[0-9]+}}, {{w[0-9]+}}, #0xf8
+; CHECK-NEXT: bfxil [[REG1]], w2, #16, #3
+; CHECK-NEXT: sturb [[REG1]],
+; CHECK-NEXT: ret
+ %0 = load i32, i32* %ptr32, align 8
+ %and = and i32 %0, -8
+ %shr = lshr i32 %x, 16
+ %and1 = and i32 %shr, 7
+ %or = or i32 %and, %and1
+ %trunc = trunc i32 %or to i8
+ %gep = getelementptr i8, i8* %ptr8, i64 -1
+ store i8 %trunc, i8* %gep
+ ret void
+}
+
+define void @test_nouseful_sturh(i32* %ptr32, i16* %ptr16, i32 %x) {
+entry:
+; CHECK-LABEL: @test_nouseful_sturh
+; CHECK: ldr [[REG1:w[0-9]+]],
+; CHECK-NOT: and {{w[0-9]+}}, {{w[0-9]+}}, #0xfff0
+; CHECK-NEXT: bfxil [[REG1]], w2, #16, #4
+; CHECK-NEXT: sturh [[REG1]],
+; CHECK-NEXT: ret
+ %0 = load i32, i32* %ptr32, align 8
+ %and = and i32 %0, -16
+ %shr = lshr i32 %x, 16
+ %and1 = and i32 %shr, 15
+ %or = or i32 %and, %and1
+ %trunc = trunc i32 %or to i16
+ %gep = getelementptr i16, i16* %ptr16, i64 -1
+ store i16 %trunc, i16* %gep
+ ret void
+}
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