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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-07-19 16:45:48 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-07-19 16:45:48 +0000
commit870f49e6903dd00fdaa53eaf07180559fa42f73c (patch)
tree4df3689ad392252c94d4f3fa209ababa8a1ec9f2 /llvm/test/CodeGen
parentb45853f173139c7c3078b97f53e7a6eba6148c13 (diff)
downloadbcm5719-llvm-870f49e6903dd00fdaa53eaf07180559fa42f73c.tar.gz
bcm5719-llvm-870f49e6903dd00fdaa53eaf07180559fa42f73c.zip
AMDGPU: Add some function return test cases
llvm-svn: 366591
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AMDGPU/function-returns.ll20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/function-returns.ll b/llvm/test/CodeGen/AMDGPU/function-returns.ll
index be1a02d0666..f40729dc0a7 100644
--- a/llvm/test/CodeGen/AMDGPU/function-returns.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-returns.ll
@@ -94,6 +94,16 @@ define i32 @i32_func_void() #0 {
ret i32 %val
}
+; GCN-LABEL: {{^}}i48_func_void:
+; GCN: buffer_load_dword v0, off
+; GCN-NEXT: buffer_load_ushort v1, off
+; GCN-NEXT: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_setpc_b64
+define i48 @i48_func_void() #0 {
+ %val = load i48, i48 addrspace(1)* undef, align 8
+ ret i48 %val
+}
+
; GCN-LABEL: {{^}}i64_func_void:
; GCN: buffer_load_dwordx2 v[0:1], off
; GCN-NEXT: s_waitcnt vmcnt(0)
@@ -103,6 +113,16 @@ define i64 @i64_func_void() #0 {
ret i64 %val
}
+; GCN-LABEL: {{^}}i65_func_void:
+; GCN-DAG: buffer_load_dwordx2 v[0:1], off
+; GCN-DAG: buffer_load_ubyte v2, off
+; GCN: s_waitcnt vmcnt(0)
+; GCN-NEXT: s_setpc_b64
+define i65 @i65_func_void() #0 {
+ %val = load i65, i65 addrspace(1)* undef
+ ret i65 %val
+}
+
; GCN-LABEL: {{^}}f32_func_void:
; GCN: buffer_load_dword v0, off, s[4:7], 0
; GCN-NEXT: s_waitcnt vmcnt(0)
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