[AsmPrinter] refactor to support %c w/ GlobalAddress'

Summary:
Targets like ARM, MSP430, PPC, and SystemZ have complex behavior when
printing the address of a MachineOperand::MO_GlobalAddress. Move that
handling into a new overriden method in each base class. A virtual
method was added to the base class for handling the generic case.

Refactors a few subclasses to support the target independent %a, %c, and
%n.

The patch also contains small cleanups for AVRAsmPrinter and
SystemZAsmPrinter.

It seems that NVPTXTargetLowering is possibly missing some logic to
transform GlobalAddressSDNodes for
TargetLowering::LowerAsmOperandForConstraint to handle with "i" extended
inline assembly asm constraints.

Fixes:
- https://bugs.llvm.org/show_bug.cgi?id=41402
- https://github.com/ClangBuiltLinux/linux/issues/449

Reviewers: echristo, void

Reviewed By: void

Subscribers: void, craig.topper, jholewinski, dschuff, jyknight, dylanmckay, sdardis, nemanjai, javed.absar, sbc100, jgravelle-google, eraman, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, jrtc27, atanasyan, jsji, llvm-commits, kees, tpimh, nathanchance, peter.smith, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60887

llvm-svn: 359337

14 files changed, 312 insertions, 4 deletions

diff --git a/llvm/test/CodeGen/AArch64/inlineasm-output-template.ll b/llvm/test/CodeGen/AArch64/inlineasm-output-template.ll
new file mode 100644
index 00000000000..2e76ff89f45
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/inlineasm-output-template.ll
@@ -0,0 +1,27 @@
+; RUN: llc -mtriple=aarch64-linux-gnu < %s | FileCheck %s
+
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "//TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1:
+; CHECK: TEST {{_?}}baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "//TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 43
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: TEST -42
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "//TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/ARM/inlineasm-output-template.ll b/llvm/test/CodeGen/ARM/inlineasm-output-template.ll
index 9acec42cb10..0d9300da79c 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-output-template.ll
@@ -8,6 +8,15 @@ define dso_local i32 @test_inlineasm_c_output_template0() {
   ret i32 42
 }
 
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: @TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "@TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
 ; Test that %n works with immediates
 ; CHECK-LABEL: test_inlineasm_c_output_template1
 ; CHECK: @TEST -42
diff --git a/llvm/test/CodeGen/BPF/inlineasm-output-template.ll b/llvm/test/CodeGen/BPF/inlineasm-output-template.ll
new file mode 100644
index 00000000000..8faf1bd1668
--- /dev/null
+++ b/llvm/test/CodeGen/BPF/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=bpfel-linux-gnu < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: #TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: #TEST -42
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll b/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll
index b4ca1200740..23281a484a2 100644
--- a/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/Hexagon/inlineasm-output-template.ll
@@ -8,10 +8,19 @@ define dso_local i32 @test_inlineasm_c_output_template0() {
   ret i32 42
 }
 
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1:
+; CHECK: TEST {{_?}}baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "//TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 43
+}
+
 ; Test that %n works with immediates
-; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK-LABEL: test_inlineasm_c_output_template2
 ; CHECK: //TEST -42
-define dso_local i32 @test_inlineasm_c_output_template1() {
+define dso_local i32 @test_inlineasm_c_output_template2() {
   tail call void asm sideeffect "//TEST ${0:n}", "i"(i32 42)
   ret i32 42
 }
diff --git a/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll b/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
new file mode 100644
index 00000000000..9dc875c9b8d
--- /dev/null
+++ b/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=lanai-linux-gnueabi < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: !TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "!TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: !TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "!TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: !TEST -42
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "!TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/MSP430/inlineasm-output-template.ll b/llvm/test/CodeGen/MSP430/inlineasm-output-template.ll
new file mode 100644
index 00000000000..9b8ca7e58e9
--- /dev/null
+++ b/llvm/test/CodeGen/MSP430/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=msp430-linux-gnu < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: ;TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect ";TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: ;TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect ";TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: ;TEST -42
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect ";TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/Mips/inlineasm-output-template.ll b/llvm/test/CodeGen/Mips/inlineasm-output-template.ll
new file mode 100644
index 00000000000..e992ddf31dd
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=mips64el-linux-gnu < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: #TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: #TEST -42
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/NVPTX/inlineasm-output-template.ll b/llvm/test/CodeGen/NVPTX/inlineasm-output-template.ll
new file mode 100644
index 00000000000..cb1c6e20bca
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/inlineasm-output-template.ll
@@ -0,0 +1,28 @@
+; RUN: llc -march=nvptx < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: //TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "//TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; FIXME: seems this case isn't handled properly by
+; SelectionDAG TargetLowering::LowerAsmOperandForConstraint?
+; check: test_inlineasm_c_output_template1
+; check: //TEST baz
+;@baz = internal global i32 0, align 4
+;define dso_local i32 @test_inlineasm_c_output_template1() {
+;  tail call void asm sideeffect "//TEST ${0:c}", "i"(i32* nonnull @baz)
+;  ret i32 42
+;}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: //TEST -42
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "//TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll b/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll
index 037acf7fe63..ea6b30dbd9a 100644
--- a/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll
@@ -8,10 +8,19 @@ define dso_local i32 @test_inlineasm_c_output_template0() {
   ret i32 42
 }
 
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1:
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 43
+}
+
 ; Test that %n works with immediates
-; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK-LABEL: test_inlineasm_c_output_template2
 ; CHECK: #TEST -42
-define dso_local i32 @test_inlineasm_c_output_template1() {
+define dso_local i32 @test_inlineasm_c_output_template2() {
   tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
   ret i32 42
 }
diff --git a/llvm/test/CodeGen/SPARC/inlineasm-output-template.ll b/llvm/test/CodeGen/SPARC/inlineasm-output-template.ll
new file mode 100644
index 00000000000..63fae9f0f38
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=sparc-linux-gnu < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: !TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "!TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: !TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "!TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: !TEST -42
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "!TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/SystemZ/inlineasm-output-template.ll b/llvm/test/CodeGen/SystemZ/inlineasm-output-template.ll
new file mode 100644
index 00000000000..563bcba1eae
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=s390x-linux-gnu < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: #TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: #TEST -42
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/WebAssembly/inlineasm-output-template.ll b/llvm/test/CodeGen/WebAssembly/inlineasm-output-template.ll
new file mode 100644
index 00000000000..1b62ae30131
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=wasm32 < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: #TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: #TEST -42
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/X86/inline-asm-modifier-c.ll b/llvm/test/CodeGen/X86/inline-asm-modifier-c.ll
new file mode 100644
index 00000000000..d386b0676de
--- /dev/null
+++ b/llvm/test/CodeGen/X86/inline-asm-modifier-c.ll
@@ -0,0 +1,18 @@
+; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: #TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
diff --git a/llvm/test/CodeGen/XCore/inlineasm-output-template.ll b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
new file mode 100644
index 00000000000..f7e73efae09
--- /dev/null
+++ b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
@@ -0,0 +1,26 @@
+; RUN: llc -march=xcore < %s | FileCheck %s
+
+; Test that %c works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template0
+; CHECK: #TEST 42
+define dso_local i32 @test_inlineasm_c_output_template0() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32 42)
+  ret i32 42
+}
+
+; Test that %c works with global address
+; CHECK-LABEL: test_inlineasm_c_output_template2
+; CHECK: #TEST baz
+@baz = internal global i32 0, align 4
+define dso_local i32 @test_inlineasm_c_output_template2() {
+  tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+  ret i32 42
+}
+
+; Test that %n works with immediates
+; CHECK-LABEL: test_inlineasm_c_output_template1
+; CHECK: #TEST -42
+define dso_local i32 @test_inlineasm_c_output_template1() {
+  tail call void asm sideeffect "#TEST ${0:n}", "i"(i32 42)
+  ret i32 42
+}