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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-04-20 07:14:25 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-04-20 07:14:25 +0000 |
| commit | 7a87977fb21cc30561a00ff8d4914b5a53ad9eca (patch) | |
| tree | ece61ab2cfe2f3ced31bc8e69c4fc676ce1e11b4 /llvm/test/CodeGen | |
| parent | 793af3b9f0a765912a1a27c473b6514c8108ddca (diff) | |
| download | bcm5719-llvm-7a87977fb21cc30561a00ff8d4914b5a53ad9eca.tar.gz bcm5719-llvm-7a87977fb21cc30561a00ff8d4914b5a53ad9eca.zip | |
AMDGPU: Legalize the operand of SI_INIT_M0
Summary:
This fixes a case where the argument to a sendmsg intrinsic
ends up in a VGPR, for whatever reason.
The underlying performance issue is that a multiplication that
can be an s_mul_i32 is instead needlessly generated as
v_mul_u32_u24, but this is not addressed by this patch.
Change-Id: I61fd4034314d5acdf6074632c30b65364dfa7328
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45826
llvm-svn: 330393
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll index 94aeb077ebe..594f7604879 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll @@ -121,6 +121,21 @@ body: ret void } +; TODO: This should use s_mul_i32 instead of v_mul_u32_u24 + v_readfirstlane! +; +; GCN-LABEL: {{^}}test_mul24: +; GCN: v_mul_u32_u24_e32 +; GCN: v_readfirstlane_b32 +; GCN: s_mov_b32 m0, +; GCN: s_sendmsg sendmsg(MSG_INTERRUPT) +define amdgpu_gs void @test_mul24(i32 inreg %arg) { +body: + %tmp1 = and i32 %arg, 511 + %tmp2 = mul nuw nsw i32 %tmp1, 12288 + call void @llvm.amdgcn.s.sendmsg(i32 1, i32 %tmp2) + ret void +} + declare void @llvm.amdgcn.s.sendmsg(i32, i32) #0 declare void @llvm.amdgcn.s.sendmsghalt(i32, i32) #0 |
