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| author | Chad Rosier <mcrosier@codeaurora.org> | 2013-10-31 22:36:59 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2013-10-31 22:36:59 +0000 |
| commit | 74b65cd811163f3a0ee24760b10336911a5288e8 (patch) | |
| tree | da2d3e483584d894c2e3d2aeebf2dc8e14051f02 /llvm/test/CodeGen | |
| parent | dc360d57393ce1d196800c4e9d61b598c35c9a7b (diff) | |
| download | bcm5719-llvm-74b65cd811163f3a0ee24760b10336911a5288e8.tar.gz bcm5719-llvm-74b65cd811163f3a0ee24760b10336911a5288e8.zip | |
[AArch64] Add support for NEON scalar fixed-point convert to floating-point instructions.
llvm-svn: 193816
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/neon-scalar-cvt.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/neon-scalar-cvt.ll b/llvm/test/CodeGen/AArch64/neon-scalar-cvt.ll index 0d9fdf3c973..056504a67e8 100644 --- a/llvm/test/CodeGen/AArch64/neon-scalar-cvt.ll +++ b/llvm/test/CodeGen/AArch64/neon-scalar-cvt.ll @@ -47,3 +47,51 @@ entry: } declare <1 x double> @llvm.aarch64.neon.vcvtf64.u64(<1 x i64>) + +define float @test_vcvts_n_f32_s32(i32 %a) { +; CHECK: test_vcvts_n_f32_s32 +; CHECK: scvtf {{s[0-9]+}}, {{s[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0 + %vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32> %vcvtf, i32 1) + %0 = extractelement <1 x float> %vcvtf1, i32 0 + ret float %0 +} + +declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.s32(<1 x i32>, i32) + +define double @test_vcvtd_n_f64_s64(i64 %a) { +; CHECK: test_vcvtd_n_f64_s64 +; CHECK: scvtf {{d[0-9]+}}, {{d[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0 + %vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64> %vcvtf, i32 1) + %0 = extractelement <1 x double> %vcvtf1, i32 0 + ret double %0 +} + +declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.s64(<1 x i64>, i32) + +define float @test_vcvts_n_f32_u32(i32 %a) { +; CHECK: test_vcvts_n_f32_u32 +; CHECK: ucvtf {{s[0-9]+}}, {{s[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i32> undef, i32 %a, i32 0 + %vcvtf1 = tail call <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32> %vcvtf, i32 1) + %0 = extractelement <1 x float> %vcvtf1, i32 0 + ret float %0 +} + +declare <1 x float> @llvm.aarch64.neon.vcvtf32.n.u32(<1 x i32>, i32) + +define double @test_vcvtd_n_f64_u64(i64 %a) { +; CHECK: test_vcvtd_n_f64_u64 +; CHECK: ucvtf {{d[0-9]+}}, {{d[0-9]+}}, #1 +entry: + %vcvtf = insertelement <1 x i64> undef, i64 %a, i32 0 + %vcvtf1 = tail call <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64> %vcvtf, i32 1) + %0 = extractelement <1 x double> %vcvtf1, i32 0 + ret double %0 +} + +declare <1 x double> @llvm.aarch64.neon.vcvtf64.n.u64(<1 x i64>, i32) |
