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author | Dylan McKay <me@dylanmckay.io> | 2019-01-18 06:10:41 +0000 |
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committer | Dylan McKay <me@dylanmckay.io> | 2019-01-18 06:10:41 +0000 |
commit | 7203e00b5e4e83117524242df372c293b0952d60 (patch) | |
tree | ca9dcb23c7032a23e6706cbbe0c4effb0c948b52 /llvm/test/CodeGen | |
parent | f47bef661ec171a5de35816365c05738be7159cd (diff) | |
download | bcm5719-llvm-7203e00b5e4e83117524242df372c293b0952d60.tar.gz bcm5719-llvm-7203e00b5e4e83117524242df372c293b0952d60.zip |
[AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL
This change modifies the LLVM ISel lowering settings so that
8-bit/16-bit multiplication is expanded to calls into the compiler
runtime library if the MCU being targeted does not support
multiplication in hardware.
Before this, MUL instructions would be generated on CPUs like the
ATtiny85, triggering a CPU reset due to an illegal instruction at
runtime.
First raised in https://github.com/avr-rust/rust/issues/124.
llvm-svn: 351523
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r-- | llvm/test/CodeGen/AVR/hardware-mul.ll (renamed from llvm/test/CodeGen/AVR/mul.ll) | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/AVR/software-mul.ll | 28 | ||||
-rw-r--r-- | llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 |
4 files changed, 32 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AVR/mul.ll b/llvm/test/CodeGen/AVR/hardware-mul.ll index 2f169347c46..650697857b7 100644 --- a/llvm/test/CodeGen/AVR/mul.ll +++ b/llvm/test/CodeGen/AVR/hardware-mul.ll @@ -1,5 +1,7 @@ ; RUN: llc -mattr=mul,movw < %s -march=avr | FileCheck %s +; Tests lowering of multiplication to hardware instructions. + define i8 @mult8(i8 %a, i8 %b) { ; CHECK-LABEL: mult8: ; CHECK: muls r22, r24 diff --git a/llvm/test/CodeGen/AVR/smul-with-overflow.ll b/llvm/test/CodeGen/AVR/smul-with-overflow.ll index 745e93005cc..9eb2c7411de 100644 --- a/llvm/test/CodeGen/AVR/smul-with-overflow.ll +++ b/llvm/test/CodeGen/AVR/smul-with-overflow.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=avr | FileCheck %s +; RUN: llc -mattr=avr6 < %s -march=avr | FileCheck %s define i1 @signed_multiplication_did_overflow(i8, i8) unnamed_addr { ; CHECK-LABEL: signed_multiplication_did_overflow: diff --git a/llvm/test/CodeGen/AVR/software-mul.ll b/llvm/test/CodeGen/AVR/software-mul.ll new file mode 100644 index 00000000000..9a4d28127eb --- /dev/null +++ b/llvm/test/CodeGen/AVR/software-mul.ll @@ -0,0 +1,28 @@ +; RUN: llc -mattr=avr6,-mul < %s -march=avr | FileCheck %s +; RUN: llc -mcpu=attiny85 < %s -march=avr | FileCheck %s +; RUN: llc -mcpu=ata5272 < %s -march=avr | FileCheck %s +; RUN: llc -mcpu=attiny861a < %s -march=avr | FileCheck %s +; RUN: llc -mcpu=at90usb82 < %s -march=avr | FileCheck %s + +; Tests lowering of multiplication to compiler support routines. + +; CHECK-LABEL: mul8: +define i8 @mul8(i8 %a, i8 %b) { +; CHECK: mov r25, r24 +; CHECK: mov r24, r22 +; CHECK: mov r22, r25 +; CHECK: call __mulqi3 + %mul = mul i8 %b, %a + ret i8 %mul +} + +; CHECK-LABEL: mul16: +define i16 @mul16(i16 %a, i16 %b) { +; CHECK: movw r18, r24 +; CHECK: movw r24, r22 +; CHECK: movw r22, r18 +; CHECK: call __mulhi3 + %mul = mul nsw i16 %b, %a + ret i16 %mul +} + diff --git a/llvm/test/CodeGen/AVR/umul-with-overflow.ll b/llvm/test/CodeGen/AVR/umul-with-overflow.ll index aa8b10a313d..c6457552dea 100644 --- a/llvm/test/CodeGen/AVR/umul-with-overflow.ll +++ b/llvm/test/CodeGen/AVR/umul-with-overflow.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=avr | FileCheck %s +; RUN: llc -mattr=avr6 < %s -march=avr | FileCheck %s define i1 @unsigned_multiplication_did_overflow(i8, i8) unnamed_addr { ; CHECK-LABEL: unsigned_multiplication_did_overflow: |