[Hexagon] Remove trailing spaces, NFC

llvm-svn: 318875

6 files changed, 6 insertions, 6 deletions

diff --git a/llvm/test/CodeGen/Hexagon/inline-asm-qv.ll b/llvm/test/CodeGen/Hexagon/inline-asm-qv.ll
index d540c09c1dd..26f4ac0bd03 100644
--- a/llvm/test/CodeGen/Hexagon/inline-asm-qv.ll
+++ b/llvm/test/CodeGen/Hexagon/inline-asm-qv.ll
@@ -15,5 +15,5 @@ entry:
   ret void
 }
 
-attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
 attributes #1 = { nounwind readnone }
diff --git a/llvm/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll b/llvm/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
index ee56e905162..7984fee5558 100644
--- a/llvm/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
+++ b/llvm/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
@@ -342,7 +342,7 @@ declare float @llvm.hexagon.F2.sfimm.n(i32)
 define float @F2_sfimm_n() {
   %z = call float @llvm.hexagon.F2.sfimm.n(i32 0)
   ret float %z
-} 
+}
 ; CHECK: = sfmake(#0):neg
 
 declare double @llvm.hexagon.F2.dfimm.p(i32)
diff --git a/llvm/test/CodeGen/Hexagon/mulh.ll b/llvm/test/CodeGen/Hexagon/mulh.ll
index 0442e28d408..013c69199cd 100644
--- a/llvm/test/CodeGen/Hexagon/mulh.ll
+++ b/llvm/test/CodeGen/Hexagon/mulh.ll
@@ -3,7 +3,7 @@
 target triple = "hexagon"
 
 ; CHECK-LABEL: danny:
-; CHECK: r{{[0-9]+}} = mpy(r0,r1)  
+; CHECK: r{{[0-9]+}} = mpy(r0,r1)
 define i32 @danny(i32 %a0, i32 %a1) {
 b2:
   %v3 = sext i32 %a0 to i64
diff --git a/llvm/test/CodeGen/Hexagon/newvaluejump2.ll b/llvm/test/CodeGen/Hexagon/newvaluejump2.ll
index fbc3f2925d1..99c9d1a60af 100644
--- a/llvm/test/CodeGen/Hexagon/newvaluejump2.ll
+++ b/llvm/test/CodeGen/Hexagon/newvaluejump2.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -march=hexagon -mcpu=hexagonv5 -disable-hexagon-misched < %s \
 ; RUN:    | FileCheck %s
-; Check that we generate new value jump, both registers, with one 
+; Check that we generate new value jump, both registers, with one
 ; of the registers as new.
 
 @Reg = common global i32 0, align 4
diff --git a/llvm/test/CodeGen/Hexagon/rdf-copy.ll b/llvm/test/CodeGen/Hexagon/rdf-copy.ll
index ce47cf672d7..0a6a43a1cb0 100644
--- a/llvm/test/CodeGen/Hexagon/rdf-copy.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-copy.ll
@@ -1,5 +1,5 @@
 ; RUN: llc -march=hexagon < %s | FileCheck %s
-; 
+;
 ; Check that
 ;     {
 ;         r1 = r0
diff --git a/llvm/test/CodeGen/Hexagon/split-const32-const64.ll b/llvm/test/CodeGen/Hexagon/split-const32-const64.ll
index 95741462e50..30bc5ed3225 100644
--- a/llvm/test/CodeGen/Hexagon/split-const32-const64.ll
+++ b/llvm/test/CodeGen/Hexagon/split-const32-const64.ll
@@ -9,7 +9,7 @@
 @lb = external global i64
 
 ; CHECK-LABEL: test1:
-; CHECK-NOT: CONST32 
+; CHECK-NOT: CONST32
 define void @test1() nounwind {
 entry:
   br label %block