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authorTim Northover <tnorthover@apple.com>2014-06-03 13:54:53 +0000
committerTim Northover <tnorthover@apple.com>2014-06-03 13:54:53 +0000
commit6890add11d2ef1948d4c16dca68a8ea96d46535d (patch)
tree99265ee3b3d4bdcfbdbf3b21b74cb4b69427e9dd /llvm/test/CodeGen
parent8c557283c0576d3382d70e859213ff50b1106dd4 (diff)
downloadbcm5719-llvm-6890add11d2ef1948d4c16dca68a8ea96d46535d.tar.gz
bcm5719-llvm-6890add11d2ef1948d4c16dca68a8ea96d46535d.zip
AArch64: mark small types (i1, i8, i16) as promoted
This means the output of LowerFormalArguments returns a lowered SDValue with the correct type (expected in SelectionDAGBuilder). Without this, an assertion under a DEBUG macro triggers when those types are passed on the stack. llvm-svn: 210102
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-abi.ll27
1 files changed, 14 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-abi.ll b/llvm/test/CodeGen/AArch64/arm64-abi.ll
index e2de434c7b0..a955029b372 100644
--- a/llvm/test/CodeGen/AArch64/arm64-abi.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-abi.ll
@@ -1,5 +1,6 @@
-; RUN: llc < %s -march=arm64 -mcpu=cyclone -enable-misched=false | FileCheck %s
+; RUN: llc < %s -debug -march=arm64 -mcpu=cyclone -enable-misched=false | FileCheck %s
; RUN: llc < %s -O0 | FileCheck -check-prefix=FAST %s
+; REQUIRES: asserts
target triple = "arm64-apple-darwin"
; rdar://9932559
@@ -8,15 +9,15 @@ entry:
; CHECK-LABEL: i8i16callee:
; The 8th, 9th, 10th and 11th arguments are passed at sp, sp+2, sp+4, sp+5.
; They are i8, i16, i8 and i8.
-; CHECK: ldrsb {{w[0-9]+}}, [sp, #5]
-; CHECK: ldrsh {{w[0-9]+}}, [sp, #2]
-; CHECK: ldrsb {{w[0-9]+}}, [sp]
-; CHECK: ldrsb {{w[0-9]+}}, [sp, #4]
+; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
+; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
+; CHECK-DAG: ldrsh {{w[0-9]+}}, [sp, #2]
+; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp]
; FAST-LABEL: i8i16callee:
-; FAST: ldrb {{w[0-9]+}}, [sp, #5]
-; FAST: ldrb {{w[0-9]+}}, [sp, #4]
-; FAST: ldrh {{w[0-9]+}}, [sp, #2]
-; FAST: ldrb {{w[0-9]+}}, [sp]
+; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
+; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
+; FAST-DAG: ldrsh {{w[0-9]+}}, [sp, #2]
+; FAST-DAG: ldrsb {{w[0-9]+}}, [sp]
%conv = sext i8 %a4 to i64
%conv3 = sext i16 %a5 to i64
%conv8 = sext i8 %b1 to i64
@@ -44,10 +45,10 @@ entry:
; CHECK: i8i16caller
; The 8th, 9th, 10th and 11th arguments are passed at sp, sp+2, sp+4, sp+5.
; They are i8, i16, i8 and i8.
-; CHECK: strb {{w[0-9]+}}, [sp, #5]
-; CHECK: strb {{w[0-9]+}}, [sp, #4]
-; CHECK: strh {{w[0-9]+}}, [sp, #2]
-; CHECK: strb {{w[0-9]+}}, [sp]
+; CHECK-DAG: strb {{w[0-9]+}}, [sp, #5]
+; CHECK-DAG: strb {{w[0-9]+}}, [sp, #4]
+; CHECK-DAG: strh {{w[0-9]+}}, [sp, #2]
+; CHECK-DAG: strb {{w[0-9]+}}, [sp]
; CHECK: bl
; FAST: i8i16caller
; FAST: strb {{w[0-9]+}}, [sp]
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