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| author | Jozef Kolek <jozef.kolek@imgtec.com> | 2015-02-19 11:51:32 +0000 |
|---|---|---|
| committer | Jozef Kolek <jozef.kolek@imgtec.com> | 2015-02-19 11:51:32 +0000 |
| commit | 5d171fc291785f88f2da929e277c8edfc65cae75 (patch) | |
| tree | 0bf566bfed6583451c0e51b8246a8786dca61329 /llvm/test/CodeGen | |
| parent | 38dea42ddfb77c69615041b7c39bcb2353a5e3e3 (diff) | |
| download | bcm5719-llvm-5d171fc291785f88f2da929e277c8edfc65cae75.tar.gz bcm5719-llvm-5d171fc291785f88f2da929e277c8edfc65cae75.zip | |
[mips][microMIPS] Make usage of AND16, OR16 and XOR16 by code generator
Differential Revision: http://reviews.llvm.org/D7611
llvm-svn: 229845
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-and16.ll | 18 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-or16.ll | 18 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-xor16.ll | 18 |
3 files changed, 54 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/micromips-and16.ll b/llvm/test/CodeGen/Mips/micromips-and16.ll new file mode 100644 index 00000000000..4eacf18867e --- /dev/null +++ b/llvm/test/CodeGen/Mips/micromips-and16.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ +; RUN: -relocation-model=pic -O3 < %s | FileCheck %s + +define i32 @main() { +entry: + %retval = alloca i32, align 4 + %a = alloca i32, align 4 + %b = alloca i32, align 4 + %c = alloca i32, align 4 + store i32 0, i32* %retval + %0 = load i32* %b, align 4 + %1 = load i32* %c, align 4 + %and = and i32 %0, %1 + store i32 %and, i32* %a, align 4 + ret i32 0 +} + +; CHECK: and16 diff --git a/llvm/test/CodeGen/Mips/micromips-or16.ll b/llvm/test/CodeGen/Mips/micromips-or16.ll new file mode 100644 index 00000000000..ab7e79abab6 --- /dev/null +++ b/llvm/test/CodeGen/Mips/micromips-or16.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ +; RUN: -relocation-model=pic -O3 < %s | FileCheck %s + +define i32 @main() { +entry: + %retval = alloca i32, align 4 + %a = alloca i32, align 4 + %b = alloca i32, align 4 + %c = alloca i32, align 4 + store i32 0, i32* %retval + %0 = load i32* %b, align 4 + %1 = load i32* %c, align 4 + %or = or i32 %0, %1 + store i32 %or, i32* %a, align 4 + ret i32 0 +} + +; CHECK: or16 diff --git a/llvm/test/CodeGen/Mips/micromips-xor16.ll b/llvm/test/CodeGen/Mips/micromips-xor16.ll new file mode 100644 index 00000000000..991511275af --- /dev/null +++ b/llvm/test/CodeGen/Mips/micromips-xor16.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ +; RUN: -relocation-model=pic -O3 < %s | FileCheck %s + +define i32 @main() { +entry: + %retval = alloca i32, align 4 + %a = alloca i32, align 4 + %b = alloca i32, align 4 + %c = alloca i32, align 4 + store i32 0, i32* %retval + %0 = load i32* %b, align 4 + %1 = load i32* %c, align 4 + %xor = xor i32 %0, %1 + store i32 %xor, i32* %a, align 4 + ret i32 0 +} + +; CHECK: xor16 |
