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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2017-08-17 08:33:44 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2017-08-17 08:33:44 +0000 |
| commit | 57a705d9d0e6e0974a93147c54e582768858009e (patch) | |
| tree | ba9ad8481e65feb23a34ea3234ad6f280903668f /llvm/test/CodeGen | |
| parent | 124d32829c1e85a156343ab416271d06d06ef958 (diff) | |
| download | bcm5719-llvm-57a705d9d0e6e0974a93147c54e582768858009e.tar.gz bcm5719-llvm-57a705d9d0e6e0974a93147c54e582768858009e.zip | |
[SystemZ, MachineScheduler] Improve post-RA scheduling.
The idea of this patch is to continue the scheduler state over an MBB boundary
in the case where the successor block has only one predecessor. This means
that the scheduler will continue in the successor block (after emitting any
branch instructions) with e.g. maintained processor resource counters.
Benchmarks have been confirmed to benefit from this.
The algorithm in MachineScheduler.cpp that extracts scheduling regions of an
MBB has been extended so that the strategy may optionally reverse the order
of processing the regions themselves. This is controlled by a new method
doMBBSchedRegionsTopDown(), which defaults to false.
Handling the top-most region of an MBB first also means that a top-down
scheduler can continue the scheduler state across any scheduling boundary
between to regions inside MBB.
Review: Ulrich Weigand, Matthias Braun, Andy Trick.
https://reviews.llvm.org/D35053
llvm-svn: 311072
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/SystemZ/int-cmp-48.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-cmp-48.ll b/llvm/test/CodeGen/SystemZ/int-cmp-48.ll index 2a6d9d5fcaf..821283d19d0 100644 --- a/llvm/test/CodeGen/SystemZ/int-cmp-48.ll +++ b/llvm/test/CodeGen/SystemZ/int-cmp-48.ll @@ -29,8 +29,8 @@ exit: define void @f2(i8 *%src) { ; CHECK-LABEL: f2: ; CHECK: llc [[REG:%r[0-5]]], 0(%r2) -; CHECK: tmll [[REG]], 1 -; CHECK: mvi 0(%r2), 0 +; CHECK-DAG: mvi 0(%r2), 0 +; CHECK-DAG: tmll [[REG]], 1 ; CHECK: ber %r14 ; CHECK: br %r14 entry: |
