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| author | Alex Lorenz <arphaman@gmail.com> | 2015-06-24 19:56:10 +0000 |
|---|---|---|
| committer | Alex Lorenz <arphaman@gmail.com> | 2015-06-24 19:56:10 +0000 |
| commit | 54565cf02b2f40d34605b8e74f886419829ac396 (patch) | |
| tree | 407c95815266b7c2b7b889deecd52623baef61d2 /llvm/test/CodeGen | |
| parent | 989e213c180e8cb1cc6946979b4a07b6ce4c8c2d (diff) | |
| download | bcm5719-llvm-54565cf02b2f40d34605b8e74f886419829ac396.tar.gz bcm5719-llvm-54565cf02b2f40d34605b8e74f886419829ac396.zip | |
MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.
Reviewers: Duncan P. N. Exon Smith
Differential Revision: http://reviews.llvm.org/D10618
llvm-svn: 240579
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/MIR/machine-function.mir | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/MIR/register-info.mir | 36 |
2 files changed, 40 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/MIR/machine-function.mir b/llvm/test/CodeGen/MIR/machine-function.mir index a3c1d1d7392..8f053adc22b 100644 --- a/llvm/test/CodeGen/MIR/machine-function.mir +++ b/llvm/test/CodeGen/MIR/machine-function.mir @@ -25,7 +25,7 @@ # CHECK-NEXT: alignment: # CHECK-NEXT: exposesReturnsTwice: false # CHECK-NEXT: hasInlineAsm: false -# CHECK-NEXT: ... +# CHECK: ... name: foo ... --- @@ -33,7 +33,7 @@ name: foo # CHECK-NEXT: alignment: # CHECK-NEXT: exposesReturnsTwice: false # CHECK-NEXT: hasInlineAsm: false -# CHECK-NEXT: ... +# CHECK: ... name: bar ... --- @@ -41,7 +41,7 @@ name: bar # CHECK-NEXT: alignment: 8 # CHECK-NEXT: exposesReturnsTwice: false # CHECK-NEXT: hasInlineAsm: false -# CHECK-NEXT: ... +# CHECK: ... name: func alignment: 8 ... @@ -50,7 +50,7 @@ alignment: 8 # CHECK-NEXT: alignment: 16 # CHECK-NEXT: exposesReturnsTwice: true # CHECK-NEXT: hasInlineAsm: true -# CHECK-NEXT: ... +# CHECK: ... name: func2 alignment: 16 exposesReturnsTwice: true diff --git a/llvm/test/CodeGen/MIR/register-info.mir b/llvm/test/CodeGen/MIR/register-info.mir new file mode 100644 index 00000000000..c01997b4685 --- /dev/null +++ b/llvm/test/CodeGen/MIR/register-info.mir @@ -0,0 +1,36 @@ +# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# This test ensures that the MIR parser parses machine register info properties +# correctly. + +--- | + + define i32 @foo() { + entry: + ret i32 0 + } + + define i32 @bar() { + start: + ret i32 0 + } + +... +--- +# CHECK: name: foo +# CHECK: isSSA: false +# CHECK-NEXT: tracksRegLiveness: false +# CHECK-NEXT: tracksSubRegLiveness: false +# CHECK: ... +name: foo +... +--- +# CHECK: name: bar +# CHECK: isSSA: false +# CHECK-NEXT: tracksRegLiveness: true +# CHECK-NEXT: tracksSubRegLiveness: true +# CHECK: ... +name: bar +isSSA: false +tracksRegLiveness: true +tracksSubRegLiveness: true +... |
