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authorIgor Breger <igor.breger@intel.com>2017-03-26 08:11:12 +0000
committerIgor Breger <igor.breger@intel.com>2017-03-26 08:11:12 +0000
commit531a203a0617ddabc7ab5bd4342b1697dd9625be (patch)
treecec10f8fd45352473c2ee4e683949fff5383b8c8 /llvm/test/CodeGen
parentfa7367428ae39271e5a2f2554f7c607d9b07a5c8 (diff)
downloadbcm5719-llvm-531a203a0617ddabc7ab5bd4342b1697dd9625be.tar.gz
bcm5719-llvm-531a203a0617ddabc7ab5bd4342b1697dd9625be.zip
[GlobalISel][X86] support G_FRAME_INDEX instruction selection.
Summary: Support G_FRAME_INDEX instruction selection. Reviewers: zvi, rovka, ab, qcolombet Reviewed By: ab Subscribers: llvm-commits, dberris, kristof.beyls, eladcohen, guyblank Differential Revision: https://reviews.llvm.org/D30980 llvm-svn: 298800
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/frameIndex-instructionselect.mir36
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll30
2 files changed, 66 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/frameIndex-instructionselect.mir b/llvm/test/CodeGen/X86/GlobalISel/frameIndex-instructionselect.mir
new file mode 100644
index 00000000000..2fa9ac23a7a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/frameIndex-instructionselect.mir
@@ -0,0 +1,36 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64
+# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32
+# RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -run-pass=instruction-select %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32ABI
+
+--- |
+ define i32* @allocai32() {
+ %ptr1 = alloca i32
+ ret i32* %ptr1
+ }
+
+...
+---
+name: allocai32
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK-LABEL: name: allocai32
+# CHECK: registers:
+# CHECK-X32: - { id: 0, class: gr32 }
+# CHECK-X32ABI: - { id: 0, class: gr32 }
+# CHECK-X64: - { id: 0, class: gr64 }
+registers:
+ - { id: 0, class: gpr }
+stack:
+ - { id: 0, name: ptr1, offset: 0, size: 4, alignment: 4 }
+
+# CHECK-X32: %0 = LEA32r %stack.0.ptr1, 1, _, 0, _
+# CHECK-X32ABI: %0 = LEA64_32r %stack.0.ptr1, 1, _, 0, _
+# CHECK-X64: %0 = LEA64r %stack.0.ptr1, 1, _, 0, _
+body: |
+ bb.1 (%ir-block.0):
+ %0(p0) = G_FRAME_INDEX %stack.0.ptr1
+ %eax = COPY %0(p0)
+ RET 0, implicit %eax
+
+...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll b/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
new file mode 100644
index 00000000000..2bb11adcc3b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -mtriple=x86_64-linux-gnu < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -mtriple=i386-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -mtriple=i386-linux-gnu < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel < %s -o - | FileCheck %s --check-prefix=X32ABI
+; RUN: llc -mtriple=x86_64-linux-gnux32 < %s -o - | FileCheck %s --check-prefix=X32ABI
+
+define i32* @allocai32() {
+; X64-LABEL: allocai32:
+; X64: # BB#0:
+; X64-NEXT: leaq -4(%rsp), %rax
+; X64-NEXT: retq
+;
+; X32-LABEL: allocai32:
+; X32: # BB#0:
+; X32-NEXT: pushl %eax
+; X32-NEXT: .Lcfi0:
+; X32-NEXT: .cfi_def_cfa_offset 8
+; X32-NEXT: movl %esp, %eax
+; X32-NEXT: popl %ecx
+; X32-NEXT: retl
+;
+; X32ABI-LABEL: allocai32:
+; X32ABI: # BB#0:
+; X32ABI-NEXT: leal -4(%rsp), %eax
+; X32ABI-NEXT: retq
+ %ptr1 = alloca i32
+ ret i32* %ptr1
+}
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