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| author | Hal Finkel <hfinkel@anl.gov> | 2015-01-16 04:40:58 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2015-01-16 04:40:58 +0000 |
| commit | 52f7c018d3435287d558e77de5859679aa3eb764 (patch) | |
| tree | 311aa61ac11f8cd203287c42b31c03843d85f2f1 /llvm/test/CodeGen | |
| parent | 6fffd487ee91243cc9f50e1e6dcb024d0dad6ea2 (diff) | |
| download | bcm5719-llvm-52f7c018d3435287d558e77de5859679aa3eb764.tar.gz bcm5719-llvm-52f7c018d3435287d558e77de5859679aa3eb764.zip | |
[PowerPC] Adjust PatchPoints for ppc64le
Bill Schmidt pointed out that some adjustments would be needed to properly
support powerpc64le (using the ELF V2 ABI). For one thing, R11 is not available
as a scratch register, so we need to use R12. R12 is also available under ELF
V1, so to maintain consistency, I flipped the order to make R12 the first
scratch register in the array under both ABIs.
llvm-svn: 226247
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll | 34 |
1 files changed, 19 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll b/llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll index 5e58fdab216..6580effbba2 100644 --- a/llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-patchpoint.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s | FileCheck %s -; RUN: llc -fast-isel -fast-isel-abort < %s | FileCheck %s -target datalayout = "E-m:e-i64:64-n32:64" +; RUN: llc < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE +; RUN: llc -fast-isel -fast-isel-abort < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -fast-isel -fast-isel-abort < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE + target triple = "powerpc64-unknown-linux-gnu" ; Trivial patchpoint codegen @@ -9,18 +11,18 @@ define i64 @trivial_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: ; CHECK-LABEL: trivial_patchpoint_codegen: -; CHECK: li 11, -8531 -; CHECK-NEXT: rldic 11, 11, 32, 16 -; CHECK-NEXT: oris 11, 11, 48879 -; CHECK-NEXT: ori 11, 11, 51966 -; CHECK-NEXT: mtctr 11 +; CHECK: li 12, -8531 +; CHECK-NEXT: rldic 12, 12, 32, 16 +; CHECK-NEXT: oris 12, 12, 48879 +; CHECK-NEXT: ori 12, 12, 51966 +; CHECK-NEXT: mtctr 12 ; CHECK-NEXT: bctrl -; CHECK: li 11, -8531 -; CHECK-NEXT: rldic 11, 11, 32, 16 -; CHECK-NEXT: oris 11, 11, 48879 -; CHECK-NEXT: ori 11, 11, 51967 -; CHECK-NEXT: mtctr 11 +; CHECK: li 12, -8531 +; CHECK-NEXT: rldic 12, 12, 32, 16 +; CHECK-NEXT: oris 12, 12, 48879 +; CHECK-NEXT: ori 12, 12, 51967 +; CHECK-NEXT: mtctr 12 ; CHECK-NEXT: bctrl ; CHECK: blr @@ -36,9 +38,11 @@ entry: ; as a leaf function. ; ; CHECK-LABEL: caller_meta_leaf -; CHECK: stdu 1, -80(1) +; CHECK-BE: stdu 1, -80(1) +; CHECK-LE: stdu 1, -64(1) ; CHECK: Ltmp -; CHECK: addi 1, 1, 80 +; CHECK-BE: addi 1, 1, 80 +; CHECK-LE: addi 1, 1, 64 ; CHECK: blr define void @caller_meta_leaf() { |
