Change how we iterate over relocations on ELF.

For COFF and MachO, sections semantically have relocations that apply to them.
That is not the case on ELF.

In relocatable objects (.o), a section with relocations in ELF has offsets to
another section where the relocations should be applied.

In dynamic objects and executables, relocations don't have an offset, they have
a virtual address. The section sh_info may or may not point to another section,
but that is not actually used for resolving the relocations.

This patch exposes that in the ObjectFile API. It has the following advantages:

* Most (all?) clients can handle this more efficiently. They will normally walk
all relocations, so doing an effort to iterate in a particular order doesn't
save time.

* llvm-readobj now prints relocations in the same way the native readelf does.

* probably most important, relocations that don't point to any section are now
visible. This is the case of relocations in the rela.dyn section. See the
updated relocation-executable.test for example.

llvm-svn: 182908

12 files changed, 18 insertions, 18 deletions

diff --git a/llvm/test/CodeGen/AArch64/adrp-relocation.ll b/llvm/test/CodeGen/AArch64/adrp-relocation.ll
index cf411166a3a..1e12d69b76f 100644
--- a/llvm/test/CodeGen/AArch64/adrp-relocation.ll
+++ b/llvm/test/CodeGen/AArch64/adrp-relocation.ll
@@ -20,7 +20,7 @@ entry:
 ; object file's .text section gets relocated in memory.
 
 ; CHECK:      Relocations [
-; CHECK-NEXT:   Section (1) .text {
+; CHECK-NEXT:   Section (2) .rela.text {
 ; CHECK-NEXT:     0x10 R_AARCH64_ADR_PREL_PG_HI21 testfn 0x0
 ; CHECK-NEXT:     0x14 R_AARCH64_ADD_ABS_LO12_NC testfn 0x0
 ; CHECK-NEXT:   }
diff --git a/llvm/test/CodeGen/AArch64/basic-pic.ll b/llvm/test/CodeGen/AArch64/basic-pic.ll
index da94041c95f..5343cc793ec 100644
--- a/llvm/test/CodeGen/AArch64/basic-pic.ll
+++ b/llvm/test/CodeGen/AArch64/basic-pic.ll
@@ -3,7 +3,7 @@
 
 @var = global i32 0
 
-; CHECK-ELF: RELOCATION RECORDS FOR [.text]
+; CHECK-ELF: RELOCATION RECORDS FOR [.rela.text]
 
 define i32 @get_globalvar() {
 ; CHECK: get_globalvar:
diff --git a/llvm/test/CodeGen/AArch64/elf-extern.ll b/llvm/test/CodeGen/AArch64/elf-extern.ll
index 8bf1b2ff4fa..e09aa127ca2 100644
--- a/llvm/test/CodeGen/AArch64/elf-extern.ll
+++ b/llvm/test/CodeGen/AArch64/elf-extern.ll
@@ -11,7 +11,7 @@ define i32 @check_extern() {
 }
 
 ; CHECK: Relocations [
-; CHECK:   Section (1) .text {
+; CHECK:   Section (2) .rela.text {
 ; CHECK:     0x{{[0-9,A-F]+}} R_AARCH64_CALL26 memcpy
 ; CHECK:   }
 ; CHECK: ]
diff --git a/llvm/test/CodeGen/AArch64/jump-table.ll b/llvm/test/CodeGen/AArch64/jump-table.ll
index 3c7f5f9ec1b..0f1e760a367 100644
--- a/llvm/test/CodeGen/AArch64/jump-table.ll
+++ b/llvm/test/CodeGen/AArch64/jump-table.ll
@@ -54,13 +54,13 @@ lbl4:
 ; First make sure we get a page/lo12 pair in .text to pick up the jump-table
 
 ; CHECK-ELF:      Relocations [
-; CHECK-ELF:        Section ({{[0-9]+}}) .text {
+; CHECK-ELF:        Section ({{[0-9]+}}) .rela.text {
 ; CHECK-ELF-NEXT:     0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 .rodata
 ; CHECK-ELF-NEXT:     0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC .rodata
 ; CHECK-ELF:        }
 
 ; Also check the targets in .rodata are relocated
-; CHECK-ELF:        Section ({{[0-9]+}}) .rodata {
+; CHECK-ELF:        Section ({{[0-9]+}}) .rela.rodata {
 ; CHECK-ELF-NEXT:     0x{{[0-9,A-F]+}} R_AARCH64_ABS64 .text
 ; CHECK-ELF:        }
 ; CHECK-ELF:      ]
diff --git a/llvm/test/CodeGen/ARM/2010-11-30-reloc-movt.ll b/llvm/test/CodeGen/ARM/2010-11-30-reloc-movt.ll
index 9eecd045bfa..6bea7b88e8e 100644
--- a/llvm/test/CodeGen/ARM/2010-11-30-reloc-movt.ll
+++ b/llvm/test/CodeGen/ARM/2010-11-30-reloc-movt.ll
@@ -11,15 +11,15 @@ entry:
   ret i32 %0
 ; OBJ:        Section {
 ; OBJ:          Name: .text
+; OBJ:          SectionData (
+; OBJ-NEXT:       0000: 00482DE9 000000E3 000040E3 FEFFFFEB
+; OBJ-NEXT:       0010: 0088BDE8
+; OBJ-NEXT:     )
 ; OBJ:          Relocations [
 ; OBJ-NEXT:       0x4 R_ARM_MOVW_ABS_NC a
 ; OBJ-NEXT:       0x8 R_ARM_MOVT_ABS
 ; OBJ-NEXT:       0xC R_ARM_CALL foo
 ; OBJ-NEXT:     ]
-; OBJ-NEXT:     SectionData (
-; OBJ-NEXT:       0000: 00482DE9 000000E3 000040E3 FEFFFFEB
-; OBJ-NEXT:       0010: 0088BDE8
-; OBJ-NEXT:     )
 
 }
 
diff --git a/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll b/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll
index 11f3e6db0fe..637a989240e 100644
--- a/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll
+++ b/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll
@@ -44,6 +44,6 @@ declare void @_Z15throw_exceptionv()
 ; CHECK-FP-ELIM-NEXT: 0000 00000000 b0808480
 ; CHECK-FP-ELIM-NOT: section .ARM.extab
 
-; CHECK-RELOC: RELOCATION RECORDS FOR [.ARM.exidx]
+; CHECK-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
 ; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text
 ; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0
diff --git a/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll b/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll
index 79dba084c04..5a54889d6a3 100644
--- a/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll
+++ b/llvm/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll
@@ -53,10 +53,10 @@ declare void @_Z15throw_exceptioni(i32)
 ; CHECK-FP-ELIM-NEXT: 0000 00000000 b0838480
 ; CHECK-FP-ELIM-NOT: section .ARM.extab
 
-; CHECK-RELOC: RELOCATION RECORDS FOR [.ARM.exidx]
+; CHECK-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
 ; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text
 ; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr1
 
-; CHECK-FP-ELIM-RELOC: RELOCATION RECORDS FOR [.ARM.exidx]
+; CHECK-FP-ELIM-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
 ; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_PREL31 .text
 ; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0
diff --git a/llvm/test/CodeGen/PowerPC/mcm-obj-2.ll b/llvm/test/CodeGen/PowerPC/mcm-obj-2.ll
index bc60b3baf2b..a6e98554516 100644
--- a/llvm/test/CodeGen/PowerPC/mcm-obj-2.ll
+++ b/llvm/test/CodeGen/PowerPC/mcm-obj-2.ll
@@ -20,7 +20,7 @@ entry:
 ; accessing function-scoped variable si.
 ;
 ; CHECK: Relocations [
-; CHECK:   Section (1) .text {
+; CHECK:   Section (2) .rela.text {
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]]
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]]
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]]
diff --git a/llvm/test/CodeGen/PowerPC/mcm-obj.ll b/llvm/test/CodeGen/PowerPC/mcm-obj.ll
index 720c5fb6dd6..4550c39f151 100644
--- a/llvm/test/CodeGen/PowerPC/mcm-obj.ll
+++ b/llvm/test/CodeGen/PowerPC/mcm-obj.ll
@@ -22,12 +22,12 @@ entry:
 ; accessing external variable ei.
 ;
 ; MEDIUM:      Relocations [
-; MEDIUM:        Section (1) .text {
+; MEDIUM:        Section (2) .rela.text {
 ; MEDIUM-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]
 ; MEDIUM-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
 ;
 ; LARGE:       Relocations [
-; LARGE:         Section (1) .text {
+; LARGE:         Section (2) .rela.text {
 ; LARGE-NEXT:      0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]
 ; LARGE-NEXT:      0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
 
diff --git a/llvm/test/CodeGen/PowerPC/tls-gd-obj.ll b/llvm/test/CodeGen/PowerPC/tls-gd-obj.ll
index ffc0db0d14c..26cb6f28efc 100644
--- a/llvm/test/CodeGen/PowerPC/tls-gd-obj.ll
+++ b/llvm/test/CodeGen/PowerPC/tls-gd-obj.ll
@@ -22,7 +22,7 @@ entry:
 ; for the call to __tls_get_addr.
 ;
 ; CHECK: Relocations [
-; CHECK:   Section (1) .text {
+; CHECK:   Section (2) .rela.text {
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA a
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO a
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TLSGD          a
diff --git a/llvm/test/CodeGen/PowerPC/tls-ie-obj.ll b/llvm/test/CodeGen/PowerPC/tls-ie-obj.ll
index 0f7a3529523..f24a94bdb05 100644
--- a/llvm/test/CodeGen/PowerPC/tls-ie-obj.ll
+++ b/llvm/test/CodeGen/PowerPC/tls-ie-obj.ll
@@ -21,7 +21,7 @@ entry:
 ; accessing external variable a.
 ;
 ; CHECK: Relocations [
-; CHECK:   Section (1) .text {
+; CHECK:   Section (2) .rela.text {
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_HA    a
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_LO_DS a
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TLS               a
diff --git a/llvm/test/CodeGen/PowerPC/tls-ld-obj.ll b/llvm/test/CodeGen/PowerPC/tls-ld-obj.ll
index 29ee8768455..4a7d7b3f918 100644
--- a/llvm/test/CodeGen/PowerPC/tls-ld-obj.ll
+++ b/llvm/test/CodeGen/PowerPC/tls-ld-obj.ll
@@ -23,7 +23,7 @@ entry:
 ; __tls_get_addr.
 ;
 ; CHECK: Relocations [
-; CHECK:   Section (1) .text {
+; CHECK:   Section (2) .rela.text {
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a
 ; CHECK:     0x{{[0-9,A-F]+}} R_PPC64_TLSLD          a