[CGP] add specialization for memcmp expansion with only one basic block

llvm-svn: 306485

3 files changed, 60 insertions, 72 deletions

diff --git a/llvm/test/CodeGen/PowerPC/memcmp.ll b/llvm/test/CodeGen/PowerPC/memcmp.ll
index 039c48b2a96..7cec2a1331d 100644
--- a/llvm/test/CodeGen/PowerPC/memcmp.ll
+++ b/llvm/test/CodeGen/PowerPC/memcmp.ll
@@ -13,11 +13,10 @@ entry:
 ; CHECK: ldbrx [[LOAD1:[0-9]+]]
 ; CHECK-NEXT: ldbrx [[LOAD2:[0-9]+]]
 ; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
 ; CHECK-NEXT: li [[LI2:[0-9]+]], -1
+; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
 ; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
 ; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: extsw 3, [[ISEL2]]
 ; CHECK-NEXT: blr
 }
 
@@ -34,11 +33,10 @@ entry:
 ; CHECK: lwbrx [[LOAD1:[0-9]+]]
 ; CHECK-NEXT: lwbrx [[LOAD2:[0-9]+]]
 ; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
 ; CHECK-NEXT: li [[LI2:[0-9]+]], -1
+; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
 ; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
 ; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: extsw 3, [[ISEL2]]
 ; CHECK-NEXT: blr
 }
 
@@ -55,11 +53,10 @@ entry:
 ; CHECK: lhbrx [[LOAD1:[0-9]+]]
 ; CHECK-NEXT: lhbrx [[LOAD2:[0-9]+]]
 ; CHECK-NEXT: li [[LI:[0-9]+]], 1
-; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
 ; CHECK-NEXT: li [[LI2:[0-9]+]], -1
+; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
 ; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
 ; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
-; CHECK-NEXT: extsw 3, [[ISEL2]]
 ; CHECK-NEXT: blr
 }
 
@@ -75,8 +72,11 @@ entry:
 ; CHECK-LABEL: @test4
 ; CHECK: lbz [[LOAD1:[0-9]+]]
 ; CHECK-NEXT: lbz [[LOAD2:[0-9]+]]
-; CHECK-NEXT: subf [[SUB:[0-9]+]], [[LOAD2]], [[LOAD1]]
-; CHECK-NEXT: extsw 3, [[SUB]]
+; CHECK-NEXT: li [[LI:[0-9]+]], 1
+; CHECK-NEXT: li [[LI2:[0-9]+]], -1
+; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
+; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
+; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
 ; CHECK-NEXT: blr
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/memcmpIR.ll b/llvm/test/CodeGen/PowerPC/memcmpIR.ll
index 044c8d5aa33..55f48ad19a6 100644
--- a/llvm/test/CodeGen/PowerPC/memcmpIR.ll
+++ b/llvm/test/CodeGen/PowerPC/memcmpIR.ll
@@ -59,28 +59,20 @@ define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture reado
   ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
   ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
   ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
-  ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64
-  ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64
-  ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
-  ; CHECK-NEXT:  br i1 [[ICMP]], label %endblock, label %res_block
-  
-  ; CHECK-LABEL: res_block:{{.*}}
-  ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
-  ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
-  ; CHECK-NEXT: br label %endblock
+  ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ne i32 [[BSWAP1]], [[BSWAP2]]
+  ; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]]
+  ; CHECK-NEXT: [[SELECT1:%[0-9]+]] = select i1 [[CMP2]], i32 -1, i32 1
+  ; CHECK-NEXT: [[SELECT2:%[0-9]+]] = select i1 [[CMP1]], i32 [[SELECT1]], i32 0
+  ; CHECK-NEXT: ret i32 [[SELECT2]]
 
   ; CHECK-BE-LABEL: @test2(
   ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
   ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
-  ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64
-  ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64
-  ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
-  ; CHECK-BE-NEXT:  br i1 [[ICMP]], label %endblock, label %res_block
-
-  ; CHECK-BE-LABEL: res_block:{{.*}}
-  ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
-  ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
-  ; CHECK-BE-NEXT: br label %endblock
+  ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ne i32 [[LOAD1]], [[LOAD2]]
+  ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]]
+  ; CHECK-BE-NEXT: [[SELECT1:%[0-9]+]] = select i1 [[CMP2]], i32 -1, i32 1
+  ; CHECK-BE-NEXT: [[SELECT2:%[0-9]+]] = select i1 [[CMP1]], i32 [[SELECT1]], i32 0
+  ; CHECK-BE-NEXT: ret i32 [[SELECT2]]
 
 entry:
   %0 = bitcast i32* %buffer1 to i8*
diff --git a/llvm/test/CodeGen/X86/memcmp.ll b/llvm/test/CodeGen/X86/memcmp.ll
index 608f68fb479..52ef4b0dca5 100644
--- a/llvm/test/CodeGen/X86/memcmp.ll
+++ b/llvm/test/CodeGen/X86/memcmp.ll
@@ -12,42 +12,39 @@ declare i32 @memcmp(i8*, i8*, i64)
 
 define i32 @length2(i8* %X, i8* %Y) nounwind {
 ; X32-LABEL: length2:
-; X32:       # BB#0: # %loadbb
+; X32:       # BB#0:
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X32-NEXT:    movzwl (%ecx), %ecx
 ; X32-NEXT:    movzwl (%eax), %eax
 ; X32-NEXT:    rolw $8, %cx
 ; X32-NEXT:    rolw $8, %ax
-; X32-NEXT:    movzwl %cx, %ecx
-; X32-NEXT:    movzwl %ax, %edx
-; X32-NEXT:    xorl %eax, %eax
-; X32-NEXT:    cmpl %edx, %ecx
-; X32-NEXT:    je .LBB0_3
-; X32-NEXT:  # BB#1: # %res_block
+; X32-NEXT:    cmpw %ax, %cx
 ; X32-NEXT:    movl $-1, %eax
-; X32-NEXT:    jb .LBB0_3
-; X32-NEXT:  # BB#2: # %res_block
+; X32-NEXT:    jae .LBB0_1
+; X32-NEXT:  # BB#2:
+; X32-NEXT:    je .LBB0_3
+; X32-NEXT:  .LBB0_4:
+; X32-NEXT:    retl
+; X32-NEXT:  .LBB0_1:
 ; X32-NEXT:    movl $1, %eax
-; X32-NEXT:  .LBB0_3: # %endblock
+; X32-NEXT:    jne .LBB0_4
+; X32-NEXT:  .LBB0_3:
+; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: length2:
-; X64:       # BB#0: # %loadbb
+; X64:       # BB#0:
 ; X64-NEXT:    movzwl (%rdi), %eax
 ; X64-NEXT:    movzwl (%rsi), %ecx
 ; X64-NEXT:    rolw $8, %ax
 ; X64-NEXT:    rolw $8, %cx
-; X64-NEXT:    movzwl %ax, %edx
-; X64-NEXT:    movzwl %cx, %ecx
-; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpq %rcx, %rdx
-; X64-NEXT:    je .LBB0_2
-; X64-NEXT:  # BB#1: # %res_block
+; X64-NEXT:    xorl %edx, %edx
+; X64-NEXT:    cmpw %cx, %ax
 ; X64-NEXT:    movl $-1, %ecx
 ; X64-NEXT:    movl $1, %eax
 ; X64-NEXT:    cmovbl %ecx, %eax
-; X64-NEXT:  .LBB0_2: # %endblock
+; X64-NEXT:    cmovel %edx, %eax
 ; X64-NEXT:    retq
   %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind
   ret i32 %m
@@ -169,38 +166,39 @@ define i1 @length3_eq(i8* %X, i8* %Y) nounwind {
 
 define i32 @length4(i8* %X, i8* %Y) nounwind {
 ; X32-LABEL: length4:
-; X32:       # BB#0: # %loadbb
+; X32:       # BB#0:
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X32-NEXT:    movl (%ecx), %ecx
-; X32-NEXT:    movl (%eax), %edx
+; X32-NEXT:    movl (%eax), %eax
 ; X32-NEXT:    bswapl %ecx
-; X32-NEXT:    bswapl %edx
-; X32-NEXT:    xorl %eax, %eax
-; X32-NEXT:    cmpl %edx, %ecx
-; X32-NEXT:    je .LBB6_3
-; X32-NEXT:  # BB#1: # %res_block
+; X32-NEXT:    bswapl %eax
+; X32-NEXT:    cmpl %eax, %ecx
 ; X32-NEXT:    movl $-1, %eax
-; X32-NEXT:    jb .LBB6_3
-; X32-NEXT:  # BB#2: # %res_block
+; X32-NEXT:    jae .LBB6_1
+; X32-NEXT:  # BB#2:
+; X32-NEXT:    je .LBB6_3
+; X32-NEXT:  .LBB6_4:
+; X32-NEXT:    retl
+; X32-NEXT:  .LBB6_1:
 ; X32-NEXT:    movl $1, %eax
-; X32-NEXT:  .LBB6_3: # %endblock
+; X32-NEXT:    jne .LBB6_4
+; X32-NEXT:  .LBB6_3:
+; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: length4:
-; X64:       # BB#0: # %loadbb
-; X64-NEXT:    movl (%rdi), %ecx
-; X64-NEXT:    movl (%rsi), %edx
+; X64:       # BB#0:
+; X64-NEXT:    movl (%rdi), %eax
+; X64-NEXT:    movl (%rsi), %ecx
+; X64-NEXT:    bswapl %eax
 ; X64-NEXT:    bswapl %ecx
-; X64-NEXT:    bswapl %edx
-; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpq %rdx, %rcx
-; X64-NEXT:    je .LBB6_2
-; X64-NEXT:  # BB#1: # %res_block
+; X64-NEXT:    xorl %edx, %edx
+; X64-NEXT:    cmpl %ecx, %eax
 ; X64-NEXT:    movl $-1, %ecx
 ; X64-NEXT:    movl $1, %eax
 ; X64-NEXT:    cmovbl %ecx, %eax
-; X64-NEXT:  .LBB6_2: # %endblock
+; X64-NEXT:    cmovel %edx, %eax
 ; X64-NEXT:    retq
   %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind
   ret i32 %m
@@ -303,19 +301,17 @@ define i32 @length8(i8* %X, i8* %Y) nounwind {
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: length8:
-; X64:       # BB#0: # %loadbb
-; X64-NEXT:    movq (%rdi), %rcx
-; X64-NEXT:    movq (%rsi), %rdx
+; X64:       # BB#0:
+; X64-NEXT:    movq (%rdi), %rax
+; X64-NEXT:    movq (%rsi), %rcx
+; X64-NEXT:    bswapq %rax
 ; X64-NEXT:    bswapq %rcx
-; X64-NEXT:    bswapq %rdx
-; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpq %rdx, %rcx
-; X64-NEXT:    je .LBB11_2
-; X64-NEXT:  # BB#1: # %res_block
+; X64-NEXT:    xorl %edx, %edx
+; X64-NEXT:    cmpq %rcx, %rax
 ; X64-NEXT:    movl $-1, %ecx
 ; X64-NEXT:    movl $1, %eax
 ; X64-NEXT:    cmovbl %ecx, %eax
-; X64-NEXT:  .LBB11_2: # %endblock
+; X64-NEXT:    cmovel %edx, %eax
 ; X64-NEXT:    retq
   %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind
   ret i32 %m