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authorHans Wennborg <hans@hanshq.net>2015-08-31 21:10:35 +0000
committerHans Wennborg <hans@hanshq.net>2015-08-31 21:10:35 +0000
commit4a61370b8f68af510e3876db891a6ef578a17c60 (patch)
tree0573f1d21819d9f0f8fab526fb07ed59a39d0b5b /llvm/test/CodeGen
parent21c1bc46aee2b69c2c48db8e961f0ce8394f21e1 (diff)
downloadbcm5719-llvm-4a61370b8f68af510e3876db891a6ef578a17c60.tar.gz
bcm5719-llvm-4a61370b8f68af510e3876db891a6ef578a17c60.zip
Fix CHECK directives that weren't checking.
llvm-svn: 246485
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-coalescing-MOVi32imm.ll9
-rw-r--r--llvm/test/CodeGen/AMDGPU/fcmp.ll2
-rw-r--r--llvm/test/CodeGen/AMDGPU/flat-address-space.ll14
-rw-r--r--llvm/test/CodeGen/ARM/thumb_indirect_calls.ll5
-rw-r--r--llvm/test/CodeGen/SPARC/select-mask.ll2
-rw-r--r--llvm/test/CodeGen/WinEH/wineh-cloning.ll4
6 files changed, 17 insertions, 19 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-coalescing-MOVi32imm.ll b/llvm/test/CodeGen/AArch64/arm64-coalescing-MOVi32imm.ll
index 2adbcdf3795..528d2538bb4 100644
--- a/llvm/test/CodeGen/AArch64/arm64-coalescing-MOVi32imm.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-coalescing-MOVi32imm.ll
@@ -1,9 +1,9 @@
; RUN: llc < %s | FileCheck %s
-; CHECK: orr w0, wzr, #0x1
-; CHECK-NEXT : bl foo
-; CHECK-NEXT : orr w0, wzr, #0x1
-; CHECK-NEXT : bl foo
+; CHECK: orr w0, wzr, #0x1
+; CHECK-NEXT: bl foo
+; CHECK-NEXT: orr w0, wzr, #0x1
+; CHECK-NEXT: bl foo
target triple = "aarch64--linux-android"
declare i32 @foo(i32)
@@ -15,4 +15,3 @@ entry:
%call1 = tail call i32 @foo(i32 1)
ret i32 0
}
-
diff --git a/llvm/test/CodeGen/AMDGPU/fcmp.ll b/llvm/test/CodeGen/AMDGPU/fcmp.ll
index 5207ab57bad..97d954fcc3c 100644
--- a/llvm/test/CodeGen/AMDGPU/fcmp.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcmp.ll
@@ -20,7 +20,7 @@ entry:
; CHECK: {{^}}fcmp_br:
; CHECK: SET{{[N]*}}E_DX10 * T{{[0-9]+\.[XYZW],}}
-; CHECK-NEXT {{[0-9]+(5.0}}
+; CHECK-NEXT: {{[0-9]+\(5.0}}
define void @fcmp_br(i32 addrspace(1)* %out, float %in) {
entry:
diff --git a/llvm/test/CodeGen/AMDGPU/flat-address-space.ll b/llvm/test/CodeGen/AMDGPU/flat-address-space.ll
index 8ceca078f2d..571685ca6ae 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-address-space.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-address-space.ll
@@ -83,7 +83,7 @@ define void @store_flat_trunc_i8(i8 addrspace(1)* %gptr, i32 %x) #0 {
-; CHECK-LABEL @load_flat_i32:
+; CHECK-LABEL: load_flat_i32:
; CHECK: flat_load_dword
define void @load_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
@@ -92,7 +92,7 @@ define void @load_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noa
ret void
}
-; CHECK-LABEL @load_flat_i64:
+; CHECK-LABEL: load_flat_i64:
; CHECK: flat_load_dwordx2
define void @load_flat_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast i64 addrspace(1)* %gptr to i64 addrspace(4)*
@@ -101,7 +101,7 @@ define void @load_flat_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noa
ret void
}
-; CHECK-LABEL @load_flat_v4i32:
+; CHECK-LABEL: load_flat_v4i32:
; CHECK: flat_load_dwordx4
define void @load_flat_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast <4 x i32> addrspace(1)* %gptr to <4 x i32> addrspace(4)*
@@ -110,7 +110,7 @@ define void @load_flat_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> add
ret void
}
-; CHECK-LABEL @sextload_flat_i8:
+; CHECK-LABEL: sextload_flat_i8:
; CHECK: flat_load_sbyte
define void @sextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
@@ -120,7 +120,7 @@ define void @sextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* n
ret void
}
-; CHECK-LABEL @zextload_flat_i8:
+; CHECK-LABEL: zextload_flat_i8:
; CHECK: flat_load_ubyte
define void @zextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
@@ -130,7 +130,7 @@ define void @zextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* n
ret void
}
-; CHECK-LABEL @sextload_flat_i16:
+; CHECK-LABEL: sextload_flat_i16:
; CHECK: flat_load_sshort
define void @sextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
@@ -140,7 +140,7 @@ define void @sextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)*
ret void
}
-; CHECK-LABEL @zextload_flat_i16:
+; CHECK-LABEL: zextload_flat_i16:
; CHECK: flat_load_ushort
define void @zextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %gptr) #0 {
%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
diff --git a/llvm/test/CodeGen/ARM/thumb_indirect_calls.ll b/llvm/test/CodeGen/ARM/thumb_indirect_calls.ll
index 9f1950c743c..67346c6fde9 100644
--- a/llvm/test/CodeGen/ARM/thumb_indirect_calls.ll
+++ b/llvm/test/CodeGen/ARM/thumb_indirect_calls.ll
@@ -3,7 +3,7 @@
@f = common global void (i32)* null, align 4
-; CHECK-LABEL foo:
+; CHECK-LABEL: foo:
define void @foo(i32 %x) {
entry:
%0 = load void (i32)*, void (i32)** @f, align 4
@@ -21,7 +21,7 @@ entry:
; CHECK-V5T: blx [[CALLEE]]
}
-; CHECK-LABEL bar:
+; CHECK-LABEL: bar:
define void @bar(void (i32)* nocapture %g, i32 %x, void (i32)* nocapture %h) {
entry:
tail call void %g(i32 %x)
@@ -37,4 +37,3 @@ entry:
; CHECK-V5T: blx
; CHECK-V5T: blx
}
-
diff --git a/llvm/test/CodeGen/SPARC/select-mask.ll b/llvm/test/CodeGen/SPARC/select-mask.ll
index 12e57103594..2e69a3b9be5 100644
--- a/llvm/test/CodeGen/SPARC/select-mask.ll
+++ b/llvm/test/CodeGen/SPARC/select-mask.ll
@@ -4,7 +4,7 @@
;; other than the first for SELECT. Thus, the 'trunc' got eliminated
;; as redundant. But, cmp does NOT ignore the other bits!
-; CHECK-LABEL select_mask:
+; CHECK-LABEL: select_mask:
; CHECK: ldub [%o0], [[R:%[goli][0-7]]]
; CHECK: and [[R]], 1, [[V:%[goli][0-7]]]
; CHECK: cmp [[V]], 0
diff --git a/llvm/test/CodeGen/WinEH/wineh-cloning.ll b/llvm/test/CodeGen/WinEH/wineh-cloning.ll
index fff358b902a..39e5d40a48f 100644
--- a/llvm/test/CodeGen/WinEH/wineh-cloning.ll
+++ b/llvm/test/CodeGen/WinEH/wineh-cloning.ll
@@ -168,10 +168,10 @@ exit:
; CHECK: br i1 [[b_E]], label %[[left_E:[^ ]+]], label %[[right_E:[^ ]+]]
; CHECK: [[left_C]]:
; CHECK: [[y_C:%[^ ]+]] = call i32 @g()
-; CHECK br label %[[looptail_C]]
+; CHECK: br label %[[looptail_C]]
; CHECK: [[left_E]]:
; CHECK: [[y_E:%[^ ]+]] = call i32 @g()
-; CHECK br label %[[looptail_E]]
+; CHECK: br label %[[looptail_E]]
; CHECK: [[right_C]]:
; CHECK: call void @h(i32 [[x_C]])
; CHECK: br label %[[looptail_C]]
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