diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-25 23:16:18 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-25 23:16:18 +0000 |
| commit | 42d1565844f0814d0212c911c722acc6eb579325 (patch) | |
| tree | b64f49bba92c6ca4c72702488e61892bdce291b8 /llvm/test/CodeGen | |
| parent | c16fafb24d8c54aa011618dd44c836d8ec881e1c (diff) | |
| download | bcm5719-llvm-42d1565844f0814d0212c911c722acc6eb579325.tar.gz bcm5719-llvm-42d1565844f0814d0212c911c722acc6eb579325.zip | |
R600: Fix some missing conversion testcases
llvm-svn: 218474
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/R600/fp64_to_sint.ll | 28 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/fp_to_sint.ll | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/fp_to_uint.ll | 10 |
3 files changed, 44 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/R600/fp64_to_sint.ll b/llvm/test/CodeGen/R600/fp64_to_sint.ll index 185e21c9caa..221b32d7f65 100644 --- a/llvm/test/CodeGen/R600/fp64_to_sint.ll +++ b/llvm/test/CodeGen/R600/fp64_to_sint.ll @@ -1,9 +1,29 @@ -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=CHECK +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; CHECK: @fp64_to_sint -; CHECK: V_CVT_I32_F64_e32 -define void @fp64_to_sint(i32 addrspace(1)* %out, double %in) { +; FUNC-LABEL: @fp_to_sint_f64_i32 +; SI: V_CVT_I32_F64_e32 +define void @fp_to_sint_f64_i32(i32 addrspace(1)* %out, double %in) { %result = fptosi double %in to i32 store i32 %result, i32 addrspace(1)* %out ret void } + +; FUNC-LABEL: @fp_to_sint_v2f64_v2i32 +; SI: V_CVT_I32_F64_e32 +; SI: V_CVT_I32_F64_e32 +define void @fp_to_sint_v2f64_v2i32(<2 x i32> addrspace(1)* %out, <2 x double> %in) { + %result = fptosi <2 x double> %in to <2 x i32> + store <2 x i32> %result, <2 x i32> addrspace(1)* %out + ret void +} + +; FUNC-LABEL: @fp_to_sint_v4f64_v4i32 +; SI: V_CVT_I32_F64_e32 +; SI: V_CVT_I32_F64_e32 +; SI: V_CVT_I32_F64_e32 +; SI: V_CVT_I32_F64_e32 +define void @fp_to_sint_v4f64_v4i32(<4 x i32> addrspace(1)* %out, <4 x double> %in) { + %result = fptosi <4 x double> %in to <4 x i32> + store <4 x i32> %result, <4 x i32> addrspace(1)* %out + ret void +} diff --git a/llvm/test/CodeGen/R600/fp_to_sint.ll b/llvm/test/CodeGen/R600/fp_to_sint.ll index 62d68f473ea..322a55bf6e4 100644 --- a/llvm/test/CodeGen/R600/fp_to_sint.ll +++ b/llvm/test/CodeGen/R600/fp_to_sint.ll @@ -1,6 +1,16 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; FUNC-LABEL: @fp_to_sint_i32 +; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} +; SI: V_CVT_I32_F32_e32 +; SI: S_ENDPGM +define void @fp_to_sint_i32 (i32 addrspace(1)* %out, float %in) { + %conv = fptosi float %in to i32 + store i32 %conv, i32 addrspace(1)* %out + ret void +} + ; FUNC-LABEL: @fp_to_sint_v2i32 ; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} ; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} diff --git a/llvm/test/CodeGen/R600/fp_to_uint.ll b/llvm/test/CodeGen/R600/fp_to_uint.ll index 63c77e83c24..6e71823a132 100644 --- a/llvm/test/CodeGen/R600/fp_to_uint.ll +++ b/llvm/test/CodeGen/R600/fp_to_uint.ll @@ -1,6 +1,16 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC +; FUNC-LABEL: @fp_to_uint_i32 +; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} +; SI: V_CVT_U32_F32_e32 +; SI: S_ENDPGM +define void @fp_to_uint_i32 (i32 addrspace(1)* %out, float %in) { + %conv = fptoui float %in to i32 + store i32 %conv, i32 addrspace(1)* %out + ret void +} + ; FUNC-LABEL: @fp_to_uint_v2i32 ; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} ; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} |

