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author | Sanjay Patel <spatel@rotateright.com> | 2018-11-18 15:27:19 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2018-11-18 15:27:19 +0000 |
commit | 40509997ebce38b00c3abf441ec1f620ada4012e (patch) | |
tree | cc1043d719b9de9d2a1ee463cabee9c4138b33a1 /llvm/test/CodeGen | |
parent | 42c22a1f87adf02857245b169d4ec04fca8f153c (diff) | |
download | bcm5719-llvm-40509997ebce38b00c3abf441ec1f620ada4012e.tar.gz bcm5719-llvm-40509997ebce38b00c3abf441ec1f620ada4012e.zip |
[x86] make tests immune to improvements in undef handling
llvm-svn: 347161
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r-- | llvm/test/CodeGen/X86/pr28444.ll | 18 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/shl-crash-on-legalize.ll | 31 |
2 files changed, 30 insertions, 19 deletions
diff --git a/llvm/test/CodeGen/X86/pr28444.ll b/llvm/test/CodeGen/X86/pr28444.ll index 452f01c166b..23383209e38 100644 --- a/llvm/test/CodeGen/X86/pr28444.ll +++ b/llvm/test/CodeGen/X86/pr28444.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 < %s | FileCheck %s ; https://llvm.org/bugs/show_bug.cgi?id=28444 @@ -7,16 +8,18 @@ ; i8 = extract_vector_elt v1i1, Constant:i64<0> ; i1 = extract_vector_elt v1i1, Constant:i64<0> - -; CHECK-LABEL: {{^}}extractelt_mismatch_vector_element_type: -; CHECK: movb $1, %al -; CHECK: movb %al -; CHECK: movb %al -define void @extractelt_mismatch_vector_element_type(i32 %arg) { +define void @extractelt_mismatch_vector_element_type(i32 %arg, i1 %x) { +; CHECK-LABEL: extractelt_mismatch_vector_element_type: +; CHECK: # %bb.0: # %bb +; CHECK-NEXT: movb $1, %al +; CHECK-NEXT: movb %al, (%rax) +; CHECK-NEXT: movb %al, (%rax) +; CHECK-NEXT: retq bb: %tmp = icmp ult i32 %arg, 0 %tmp2 = insertelement <1 x i1> undef, i1 true, i32 0 - %tmp3 = select i1 %tmp, <1 x i1> undef, <1 x i1> %tmp2 + %f = insertelement <1 x i1> undef, i1 %x, i32 0 + %tmp3 = select i1 %tmp, <1 x i1> %f, <1 x i1> %tmp2 %tmp6 = extractelement <1 x i1> %tmp3, i32 0 br label %bb1 @@ -25,3 +28,4 @@ bb1: store volatile i1 %tmp6, i1* undef ret void } + diff --git a/llvm/test/CodeGen/X86/shl-crash-on-legalize.ll b/llvm/test/CodeGen/X86/shl-crash-on-legalize.ll index 22735f07b0a..f079cdc1258 100644 --- a/llvm/test/CodeGen/X86/shl-crash-on-legalize.ll +++ b/llvm/test/CodeGen/X86/shl-crash-on-legalize.ll @@ -8,26 +8,33 @@ target triple = "x86_64-unknown-linux-gnu" @structMember = external local_unnamed_addr global i64, align 8 -; Function Attrs: norecurse nounwind uwtable -define i32 @_Z3foov() local_unnamed_addr #0 { -; CHECK-LABEL: _Z3foov: +define i32 @PR29058(i8 %x, i32 %y) { +; CHECK-LABEL: PR29058: ; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movl %esi, %ecx +; CHECK-NEXT: testb %dil, %dil +; CHECK-NEXT: movl $2147483646, %eax # imm = 0x7FFFFFFE +; CHECK-NEXT: cmovnel %esi, %eax +; CHECK-NEXT: cmpb $1, %dil +; CHECK-NEXT: sbbb %dl, %dl +; CHECK-NEXT: orb %dl, %cl +; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx +; CHECK-NEXT: shll %cl, %eax ; CHECK-NEXT: movq %rax, {{.*}}(%rip) +; CHECK-NEXT: # kill: def $eax killed $eax killed $rax ; CHECK-NEXT: retq entry: - %bool_1 = icmp ne i8 undef, 0 - %bool_2 = icmp eq i8 undef, 0 - %0 = select i1 %bool_2, i32 2147483646, i32 undef - %or_1 = select i1 %bool_1, i32 undef, i32 -1 + %bool_1 = icmp ne i8 %x, 0 + %bool_2 = icmp eq i8 %x, 0 + %0 = select i1 %bool_2, i32 2147483646, i32 %y + %or_1 = select i1 %bool_1, i32 %y, i32 -1 %shl_1 = shl i32 %0, %or_1 %conv = zext i32 %shl_1 to i64 store i64 %conv, i64* @structMember, align 8 - %tmp = select i1 %bool_2, i32 2147483646, i32 undef - %lnot = icmp eq i8 undef, 0 - %or_2 = select i1 %lnot, i32 -1, i32 undef + %tmp = select i1 %bool_2, i32 2147483646, i32 %y + %lnot = icmp eq i8 %x, 0 + %or_2 = select i1 %lnot, i32 -1, i32 %y %shl_2 = shl i32 %tmp, %or_2 ret i32 %shl_2 } -attributes #0 = { norecurse nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } - |