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| author | Sanjay Patel <spatel@rotateright.com> | 2018-06-18 20:05:16 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-06-18 20:05:16 +0000 |
| commit | 3e52deb1448024d14e5f445fc221dc25a905ecf7 (patch) | |
| tree | 002618841687719f31e4cb30d9b6b731d880d645 /llvm/test/CodeGen | |
| parent | a5638431dc15b057798f41586d20e3e162fefd10 (diff) | |
| download | bcm5719-llvm-3e52deb1448024d14e5f445fc221dc25a905ecf7.tar.gz bcm5719-llvm-3e52deb1448024d14e5f445fc221dc25a905ecf7.zip | |
[x86] regenerate checks and adjust tests
2 of these tests were clearly not doing what the comments
said they were doing.
The last test was added at rL177933 with no assertions
(presumably it used to crash). But either we don't have
that problem anymore, or this test is folded sooner,
so we don't hit the bug that was fixed by disabling late
FP constant creation. Looking at this as part of reviewing
D48289.
llvm-svn: 334977
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll | 58 |
1 files changed, 36 insertions, 22 deletions
diff --git a/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll b/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll index f06d9f1dc4b..62e182b998e 100644 --- a/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll +++ b/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll @@ -1,56 +1,70 @@ -; RUN: llc < %s -enable-unsafe-fp-math -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -enable-unsafe-fp-math -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s ; rdar://13126763 ; Expression "x + x*x" was mistakenly transformed into "x * 3.0f". define float @test1(float %x) { +; CHECK-LABEL: test1: +; CHECK: ## %bb.0: +; CHECK-NEXT: vmulss %xmm0, %xmm0, %xmm1 +; CHECK-NEXT: vaddss %xmm0, %xmm1, %xmm0 +; CHECK-NEXT: retq %t1 = fmul fast float %x, %x %t2 = fadd fast float %t1, %x ret float %t2 -; CHECK: test1 -; CHECK: vaddss } ; (x + x) + x => x * 3.0 define float @test2(float %x) { +; CHECK-LABEL: test2: +; CHECK: ## %bb.0: +; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 +; CHECK-NEXT: retq %t1 = fadd fast float %x, %x %t2 = fadd fast float %t1, %x ret float %t2 -; CHECK: .long 1077936128 -; CHECK: test2 -; CHECK: vmulss LCPI1_0(%rip), %xmm0, %xmm0 } ; x + (x + x) => x * 3.0 define float @test3(float %x) { +; CHECK-LABEL: test3: +; CHECK: ## %bb.0: +; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 +; CHECK-NEXT: retq %t1 = fadd fast float %x, %x - %t2 = fadd fast float %t1, %x + %t2 = fadd fast float %x, %t1 ret float %t2 -; CHECK: .long 1077936128 -; CHECK: test3 -; CHECK: vmulss LCPI2_0(%rip), %xmm0, %xmm0 } ; (y + x) + x != x * 3.0 define float @test4(float %x, float %y) { +; CHECK-LABEL: test4: +; CHECK: ## %bb.0: +; CHECK-NEXT: vaddss %xmm1, %xmm0, %xmm1 +; CHECK-NEXT: vaddss %xmm0, %xmm1, %xmm0 +; CHECK-NEXT: retq %t1 = fadd fast float %x, %y %t2 = fadd fast float %t1, %x ret float %t2 -; CHECK: test4 -; CHECK: vaddss } ; rdar://13445387 -; "x + x + x => 3.0 * x" should be disabled after legalization because +; "x + x + x => 3.0 * x" should be disabled after legalization because ; Instruction-Selection doesn't know how to handle "3.0" -; -define float @test5() { - %mul.i.i151 = fmul <4 x float> zeroinitializer, zeroinitializer - %vecext.i8.i152 = extractelement <4 x float> %mul.i.i151, i32 1 - %vecext1.i9.i153 = extractelement <4 x float> %mul.i.i151, i32 0 - %add.i10.i154 = fadd float %vecext1.i9.i153, %vecext.i8.i152 - %vecext.i7.i155 = extractelement <4 x float> %mul.i.i151, i32 2 - %add.i.i156 = fadd float %vecext.i7.i155, %add.i10.i154 - ret float %add.i.i156 +; +define float @test5(<4 x float> %x) { +; CHECK-LABEL: test5: +; CHECK: ## %bb.0: +; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 +; CHECK-NEXT: retq + %splat = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> zeroinitializer + %v1 = extractelement <4 x float> %splat, i32 1 + %v0 = extractelement <4 x float> %splat, i32 0 + %add1 = fadd float %v0, %v1 + %v2 = extractelement <4 x float> %splat, i32 2 + %add2 = fadd float %v2, %add1 + ret float %add2 } + |

