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| author | Sean Fertile <sfertile@ca.ibm.com> | 2017-01-26 18:59:15 +0000 |
|---|---|---|
| committer | Sean Fertile <sfertile@ca.ibm.com> | 2017-01-26 18:59:15 +0000 |
| commit | 3c8c385a77bbbcadb96cc0f4c65eaded257da6f8 (patch) | |
| tree | 345519e6f7ac8b34723a7b3c50902d2511c3da2b /llvm/test/CodeGen | |
| parent | c05c42567e0a2b5e5434cf0879f8795e7c1b2adb (diff) | |
| download | bcm5719-llvm-3c8c385a77bbbcadb96cc0f4c65eaded257da6f8.tar.gz bcm5719-llvm-3c8c385a77bbbcadb96cc0f4c65eaded257da6f8.zip | |
[PPC] cleanup of mayLoad/mayStore flags and memory operands.
1) Explicitly sets mayLoad/mayStore property in the tablegen files on load/store
instructions.
2) Updated the flags on a number of intrinsics indicating that they write
memory.
3) Added SDNPMemOperand flags for some target dependent SDNodes so that they
propagate their memory operand
Review: https://reviews.llvm.org/D28818
llvm-svn: 293200
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/swaps-le-7.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/swaps-le-7.ll b/llvm/test/CodeGen/PowerPC/swaps-le-7.ll index dc3c4973070..1d5f50da398 100644 --- a/llvm/test/CodeGen/PowerPC/swaps-le-7.ll +++ b/llvm/test/CodeGen/PowerPC/swaps-le-7.ll @@ -11,11 +11,11 @@ ; CHECK-LABEL: @zg ; CHECK: xxspltd ; CHECK-NEXT: xxspltd -; CHECK-NEXT: xxswapd ; CHECK-NEXT: xvmuldp ; CHECK-NEXT: xvmuldp ; CHECK-NEXT: xvsubdp ; CHECK-NEXT: xvadddp +; CHECK-NEXT: xxswapd ; CHECK-NEXT: xxpermdi ; CHECK-NEXT: xvsubdp ; CHECK-NEXT: xxswapd @@ -52,4 +52,4 @@ L.JA291: ret void } -attributes #0 = { noinline }
\ No newline at end of file +attributes #0 = { noinline } |
