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| author | Xiangling Liao <xiangxdh@gmail.com> | 2019-09-26 19:38:32 +0000 |
|---|---|---|
| committer | Xiangling Liao <xiangxdh@gmail.com> | 2019-09-26 19:38:32 +0000 |
| commit | 3b808fb330dd4e2c8bf54e88e0a820e835c278b5 (patch) | |
| tree | 024e4189b730ddb9ed75e0c801c0677dd7899123 /llvm/test/CodeGen | |
| parent | 4061a9b63a429885dfdc8b5d3371b9eb80fc7ad2 (diff) | |
| download | bcm5719-llvm-3b808fb330dd4e2c8bf54e88e0a820e835c278b5.tar.gz bcm5719-llvm-3b808fb330dd4e2c8bf54e88e0a820e835c278b5.zip | |
[AIX]Emit function descriptor csect in assembly
This patch emits the function descriptor csect for functions with definitions
under both 32-bit/64-bit mode on AIX.
Differential Revision: https://reviews.llvm.org/D66724
llvm-svn: 373009
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/aix-xcoff-common.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/test_func_desc.ll | 74 |
2 files changed, 76 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-common.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-common.ll index a3e135f15b4..ffae4a42d15 100644 --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-common.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-common.ll @@ -21,6 +21,8 @@ @array = common local_unnamed_addr global [33 x i8] zeroinitializer, align 1 +; CHECK-NOT: .toc + ; CHECK: .csect .text[PR] ; CHECK-NEXT: .file ; CHECK-NEXT: .comm a,4,2 diff --git a/llvm/test/CodeGen/PowerPC/test_func_desc.ll b/llvm/test/CodeGen/PowerPC/test_func_desc.ll new file mode 100644 index 00000000000..3cd16b94fb2 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/test_func_desc.ll @@ -0,0 +1,74 @@ +; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | \ +; RUN: FileCheck --check-prefixes=CHECK,32BIT %s + +; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | \ +; RUN: FileCheck --check-prefixes=CHECK,64BIT %s + + +define i32 @foo() { +entry: + ret i32 3 +} + +define i32 @main() { +entry: + %0 = call i32 @foo() + %1 = call i32 bitcast (i32 (...)* @extern_foo to i32 ()*)() + %2 = call i32 @static_foo() + %3 = add nsw i32 %0, %1 + %4 = add nsw i32 %3, %2 + ret i32 %4 +} + +declare i32 @extern_foo(...) + +define internal i32 @static_foo() { +entry: + ret i32 3 +} + +; CHECK: .globl foo +; CHECK: .globl .foo +; CHECK: .csect foo[DS] +; CHECK-NEXT: foo: +; 32BIT: .long .foo +; 32BIT-NEXT: .long TOC[TC0] +; 32BIT-NEXT: .long 0 +; 64BIT: .llong .foo +; 64BIT-NEXT: .llong TOC[TC0] +; 64BIT-NEXT: .llong 0 +; CHECK-NEXT: .csect .text[PR] +; CHECK-LABEL: .foo: + +; CHECK: .globl main +; CHECK: .globl .main +; CHECK: .csect main[DS] +; CHECK-NEXT: main: +; 32BIT: .long .main +; 32BIT-NEXT: .long TOC[TC0] +; 32BIT-NEXT: .long 0 +; 64BIT: .llong .main +; 64BIT-NEXT: .llong TOC[TC0] +; 64BIT-NEXT: .llong 0 +; CHECK-NEXT: .csect .text[PR] +; CHECK-LABEL: .main: +; CHECK: bl .foo +; CHECK: bl .extern_foo +; CHECK: bl .static_foo + +; CHECK: .lglobl .static_foo +; CHECK: .csect static_foo[DS] +; CHECK-NEXT: static_foo: +; 32BIT: .long .static_foo +; 32BIT-NEXT: .long TOC[TC0] +; 32BIT-NEXT: .long 0 +; 64BIT: .llong .static_foo +; 64BIT-NEXT: .llong TOC[TC0] +; 64BIT-NEXT: .llong 0 +; CHECK-NEXT: .csect .text[PR] +; CHECK-LABEL: .static_foo: + +; CHECK-NOT: .csect extern_foo + +; CHECK: .toc +; CHECK-NOT: .tc |
