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| author | Evan Cheng <evan.cheng@apple.com> | 2009-06-05 19:08:58 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-05 19:08:58 +0000 |
| commit | 3158790e32cfaa7a64810e7a3c347ff066bf1a68 (patch) | |
| tree | 8f9d349cb6212b63df162e0de815888d2920a4f4 /llvm/test/CodeGen | |
| parent | 54707b420a4e27dcb7f097f87b340eb5af88bfab (diff) | |
| download | bcm5719-llvm-3158790e32cfaa7a64810e7a3c347ff066bf1a68.tar.gz bcm5719-llvm-3158790e32cfaa7a64810e7a3c347ff066bf1a68.zip | |
Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.
llvm-svn: 72955
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/memcpy-inline.ll | 6 |
3 files changed, 4 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll b/llvm/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll index 7b7ea6bcc49..3f17a5150fb 100644 --- a/llvm/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll +++ b/llvm/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 184 +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 164 %"struct.Adv5::Ekin<3>" = type <{ i8 }> %"struct.Adv5::X::Energyflux<3>" = type { double } diff --git a/llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll index 6db0d43e834..02902f2debd 100644 --- a/llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll +++ b/llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=arm | grep -F {str r2, \[r0, +r3, lsl #2\]} +; RUN: llvm-as < %s | llc -march=arm | grep lsl | grep -F {lsl #2\]} ; Should use scaled addressing mode. define void @sintzero(i32* %a) nounwind { diff --git a/llvm/test/CodeGen/ARM/memcpy-inline.ll b/llvm/test/CodeGen/ARM/memcpy-inline.ll index 5d1beea5fc2..4bf0b4f6f3b 100644 --- a/llvm/test/CodeGen/ARM/memcpy-inline.ll +++ b/llvm/test/CodeGen/ARM/memcpy-inline.ll @@ -1,9 +1,7 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldmia +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep stmia ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrb ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrh -; This used to look for ldmia. But it's no longer lucky enough to -; have the load / store instructions lined up just right after -; scheduler change for pr3457. We'll look for a robust solution -; later. %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } @src = external global %struct.x |
