Temporarily revert r158087.

This patch causes problems when both dynamic stack realignment and
dynamic allocas combine in the same function. With this patch, we no
longer build the epilog correctly, and silently restore registers from
the wrong position in the stack.

Thanks to Matt for tracking this down, and getting at least an initial
test case to Chad. I'm going to try to check a variation of that test
case in so we can easily track the fixes required.

llvm-svn: 158654

3 files changed, 2 insertions, 170 deletions

diff --git a/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll b/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll
index a45284e10cf..c0f1a18123e 100644
--- a/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll
+++ b/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | grep and | count 1
 
 declare void @bar(<2 x i64>* %n)
 
@@ -6,15 +6,10 @@ define void @foo(i32 %h) {
   %p = alloca <2 x i64>, i32 %h
   call void @bar(<2 x i64>* %p)
   ret void
-; CHECK: foo
-; CHECK-NOT: andl $-32, %eax
 }
 
 define void @foo2(i32 %h) {
   %p = alloca <2 x i64>, i32 %h, align 32
   call void @bar(<2 x i64>* %p)
   ret void
-; CHECK: foo2
-; CHECK: andl $-32, %esp
-; CHECK: andl $-32, %eax
 }
diff --git a/llvm/test/CodeGen/X86/alloca-align-rounding.ll b/llvm/test/CodeGen/X86/alloca-align-rounding.ll
index 3d76fb0aa25..3c87dbf2bd7 100644
--- a/llvm/test/CodeGen/X86/alloca-align-rounding.ll
+++ b/llvm/test/CodeGen/X86/alloca-align-rounding.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux | grep and | count 1
 
 declare void @bar(<2 x i64>* %n)
 
@@ -6,15 +6,10 @@ define void @foo(i64 %h) {
   %p = alloca <2 x i64>, i64 %h
   call void @bar(<2 x i64>* %p)
   ret void
-; CHECK: foo
-; CHECK-NOT: andq $-32, %rax
 }
 
 define void @foo2(i64 %h) {
   %p = alloca <2 x i64>, i64 %h, align 32
   call void @bar(<2 x i64>* %p)
   ret void
-; CHECK: foo2
-; CHECK: andq $-32, %rsp
-; CHECK: andq $-32, %rax
 }
diff --git a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
deleted file mode 100644
index b787ee87c51..00000000000
--- a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
+++ /dev/null
@@ -1,158 +0,0 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s
-; rdar://11496434
-
-; no VLAs or dynamic alignment
-define i32 @t1() nounwind uwtable ssp {
-entry:
-  %a = alloca i32, align 4
-  call void @t1_helper(i32* %a) nounwind
-  %0 = load i32* %a, align 4
-  %add = add nsw i32 %0, 13
-  ret i32 %add
-
-; CHECK: _t1
-; CHECK-NOT: andq $-{{[0-9]+}}, %rsp
-; CHECK: leaq [[OFFSET:[0-9]*]](%rsp), %rdi
-; CHECK: callq _t1_helper
-; CHECK: movl [[OFFSET]](%rsp), %eax
-; CHECK: addl $13, %eax
-}
-
-declare void @t1_helper(i32*)
-
-; dynamic realignment
-define i32 @t2() nounwind uwtable ssp {
-entry:
-  %a = alloca i32, align 4
-  %v = alloca <8 x float>, align 32
-  call void @t2_helper(i32* %a, <8 x float>* %v) nounwind
-  %0 = load i32* %a, align 4
-  %add = add nsw i32 %0, 13
-  ret i32 %add
-
-; CHECK: _t2
-; CHECK: pushq %rbp
-; CHECK: movq %rsp, %rbp
-; CHECK: andq $-32, %rsp
-; CHECK: subq ${{[0-9]+}}, %rsp
-;
-; CHECK: leaq {{[0-9]*}}(%rsp), %rdi
-; CHECK: leaq {{[0-9]*}}(%rsp), %rsi
-; CHECK: callq _t2_helper
-;
-; CHECK: movq %rbp, %rsp
-; CHECK: popq %rbp
-}
-
-declare void @t2_helper(i32*, <8 x float>*)
-
-; VLAs
-define i32 @t3(i64 %sz) nounwind uwtable ssp {
-entry:
-  %a = alloca i32, align 4
-  %vla = alloca i32, i64 %sz, align 16
-  call void @t3_helper(i32* %a, i32* %vla) nounwind
-  %0 = load i32* %a, align 4
-  %add = add nsw i32 %0, 13
-  ret i32 %add
-
-; CHECK: _t3
-; CHECK: pushq %rbp
-; CHECK: movq %rsp, %rbp
-; CHECK: pushq %rbx
-; CHECK-NOT: andq $-{{[0-9]+}}, %rsp
-; CHECK: subq ${{[0-9]+}}, %rsp
-;
-; CHECK: leaq -{{[0-9]+}}(%rbp), %rsp
-; CHECK: popq %rbx
-; CHECK: popq %rbp
-}
-
-declare void @t3_helper(i32*, i32*)
-
-; VLAs + Dynamic realignment
-define i32 @t4(i64 %sz) nounwind uwtable ssp {
-entry:
-  %a = alloca i32, align 4
-  %v = alloca <8 x float>, align 32
-  %vla = alloca i32, i64 %sz, align 16
-  call void @t4_helper(i32* %a, i32* %vla, <8 x float>* %v) nounwind
-  %0 = load i32* %a, align 4
-  %add = add nsw i32 %0, 13
-  ret i32 %add
-
-; CHECK: _t4
-; CHECK: pushq %rbp
-; CHECK: movq %rsp, %rbp
-; CHECK: andq $-32, %rsp
-; CHECK: pushq %r14
-; CHECK: pushq %rbx
-; CHECK: subq $[[STACKADJ:[0-9]+]], %rsp
-; CHECK: movq %rsp, %rbx
-;
-; CHECK: leaq {{[0-9]*}}(%rbx), %rdi
-; CHECK: leaq {{[0-9]*}}(%rbx), %rdx
-; CHECK: callq   _t4_helper
-;
-; CHECK: addq $[[STACKADJ]], %rsp
-; CHECK: popq %rbx
-; CHECK: popq %r14
-; CHECK: movq %rbp, %rsp
-; CHECK: popq %rbp
-}
-
-declare void @t4_helper(i32*, i32*, <8 x float>*)
-
-; Dynamic realignment + Spill
-define i32 @t5(float* nocapture %f) nounwind uwtable ssp {
-entry:
-  %a = alloca i32, align 4
-  %0 = bitcast float* %f to <8 x float>*
-  %1 = load <8 x float>* %0, align 32
-  call void @t5_helper1(i32* %a) nounwind
-  call void @t5_helper2(<8 x float> %1) nounwind
-  %2 = load i32* %a, align 4
-  %add = add nsw i32 %2, 13
-  ret i32 %add
-
-; CHECK: _t5
-; CHECK: pushq %rbp
-; CHECK: movq %rsp, %rbp
-; CHECK: andq $-32, %rsp
-; CHECK: subq ${{[0-9]+}}, %rsp
-;
-; CHECK: vmovaps (%rdi), [[AVXREG:%ymm[0-9]+]]
-; CHECK: vmovaps [[AVXREG]], (%rsp)
-; CHECK: leaq {{[0-9]+}}(%rsp), %rdi
-; CHECK: callq   _t5_helper1
-; CHECK: vmovaps (%rsp), %ymm0
-; CHECK: callq   _t5_helper2
-; CHECK: movl {{[0-9]+}}(%rsp), %eax
-;
-; CHECK: movq %rbp, %rsp
-; CHECK: popq %rbp
-}
-
-declare void @t5_helper1(i32*)
-
-declare void @t5_helper2(<8 x float>)
-
-; VLAs + Dynamic realignment + Spill
-; FIXME: RA has already reserved RBX, so we can't do dynamic realignment.
-define i32 @t6(i64 %sz, float* nocapture %f) nounwind uwtable ssp {
-entry:
-; CHECK: _t6
-  %a = alloca i32, align 4
-  %0 = bitcast float* %f to <8 x float>*
-  %1 = load <8 x float>* %0, align 32
-  %vla = alloca i32, i64 %sz, align 16
-  call void @t6_helper1(i32* %a, i32* %vla) nounwind
-  call void @t6_helper2(<8 x float> %1) nounwind
-  %2 = load i32* %a, align 4
-  %add = add nsw i32 %2, 13
-  ret i32 %add
-}
-
-declare void @t6_helper1(i32*, i32*)
-
-declare void @t6_helper2(<8 x float>)