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authorHal Finkel <hfinkel@anl.gov>2013-11-30 19:39:27 +0000
committerHal Finkel <hfinkel@anl.gov>2013-11-30 19:39:27 +0000
commit2b655bb2288fdc1abc3ee4b5b41c67c52455003f (patch)
treefcfd6e80af035ff2c372cb72d31e89aaee144d53 /llvm/test/CodeGen
parent472486714e8c8cfbd4455fc9541b2718895d2d55 (diff)
downloadbcm5719-llvm-2b655bb2288fdc1abc3ee4b5b41c67c52455003f.tar.gz
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Update the cpu specified on some PPC regression tests
Some of these tests did not specify a cpu but were also sensitive to instruction scheduling and/or register assignment choices. A few others similarly-sensitive tests specified a cpu (often the POWER7), and while the P7 currently uses the default model for PPC64, this will soon change. For those tests which should not really be cpu-dependent anyway, the cpu is set to the generic 'ppc64'. llvm-svn: 195977
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/anon_aggr.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/coalesce-ext.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/complex-return.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/jaggedstructs.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/lsa.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/structsinmem.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/structsinregs.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/tls-2.ll2
-rw-r--r--llvm/test/CodeGen/PowerPC/tls.ll4
11 files changed, 12 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll b/llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
index 3d3728dcde1..ccf52974a67 100644
--- a/llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
+++ b/llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -mcpu=g5 < %s | FileCheck %s
;; Formerly crashed, see PR 1508
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
target triple = "powerpc64-apple-darwin8"
diff --git a/llvm/test/CodeGen/PowerPC/anon_aggr.ll b/llvm/test/CodeGen/PowerPC/anon_aggr.ll
index 1525e05501e..94b73aba8ad 100644
--- a/llvm/test/CodeGen/PowerPC/anon_aggr.ll
+++ b/llvm/test/CodeGen/PowerPC/anon_aggr.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -fast-isel=false < %s | FileCheck %s
+; RUN: llc -O0 -mcpu=ppc64 -mtriple=powerpc64-unknown-linux-gnu -fast-isel=false < %s | FileCheck %s
; RUN: llc -O0 -mcpu=g4 -mtriple=powerpc-apple-darwin8 < %s | FileCheck -check-prefix=DARWIN32 %s
; RUN: llc -O0 -mcpu=ppc970 -mtriple=powerpc64-apple-darwin8 < %s | FileCheck -check-prefix=DARWIN64 %s
diff --git a/llvm/test/CodeGen/PowerPC/coalesce-ext.ll b/llvm/test/CodeGen/PowerPC/coalesce-ext.ll
index f19175c9bea..eb7cd261b56 100644
--- a/llvm/test/CodeGen/PowerPC/coalesce-ext.ll
+++ b/llvm/test/CodeGen/PowerPC/coalesce-ext.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=ppc64 -mtriple=powerpc64-apple-darwin < %s | FileCheck %s
+; RUN: llc -march=ppc64 -mcpu=g5 -mtriple=powerpc64-apple-darwin < %s | FileCheck %s
; Check that the peephole optimizer knows about sext and zext instructions.
; CHECK: test1sext
define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
diff --git a/llvm/test/CodeGen/PowerPC/complex-return.ll b/llvm/test/CodeGen/PowerPC/complex-return.ll
index 3eb30e93fd3..5ac7524ff5c 100644
--- a/llvm/test/CodeGen/PowerPC/complex-return.ll
+++ b/llvm/test/CodeGen/PowerPC/complex-return.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=pwr7 -O0 < %s | FileCheck %s
+; RUN: llc -mcpu=ppc64 -O0 < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/PowerPC/jaggedstructs.ll b/llvm/test/CodeGen/PowerPC/jaggedstructs.ll
index 82d4fef10cb..9365e581529 100644
--- a/llvm/test/CodeGen/PowerPC/jaggedstructs.ll
+++ b/llvm/test/CodeGen/PowerPC/jaggedstructs.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false < %s | FileCheck %s
+; RUN: llc -mcpu=ppc64 -O0 -fast-isel=false < %s | FileCheck %s
; This tests receiving and re-passing parameters consisting of structures
; of size 3, 5, 6, and 7. They are to be found/placed right-adjusted in
diff --git a/llvm/test/CodeGen/PowerPC/lsa.ll b/llvm/test/CodeGen/PowerPC/lsa.ll
index 8a6338ef5a0..a892a4cf414 100644
--- a/llvm/test/CodeGen/PowerPC/lsa.ll
+++ b/llvm/test/CodeGen/PowerPC/lsa.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=ppc64 | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll b/llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll
index bc394125f13..fa540452ac2 100644
--- a/llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc32-vacopy.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple="powerpc-unknown-linux-gnu" < %s | FileCheck %s
+; RUN: llc -mtriple="powerpc-unknown-linux-gnu" -mcpu=ppc64 < %s | FileCheck %s
; PR15286
%va_list = type {i8, i8, i16, i8*, i8*}
diff --git a/llvm/test/CodeGen/PowerPC/structsinmem.ll b/llvm/test/CodeGen/PowerPC/structsinmem.ll
index 5b8dead1689..b5552af0eb5 100644
--- a/llvm/test/CodeGen/PowerPC/structsinmem.ll
+++ b/llvm/test/CodeGen/PowerPC/structsinmem.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=pwr7 -O0 -disable-fp-elim -fast-isel=false < %s | FileCheck %s
+; RUN: llc -mcpu=ppc64 -O0 -disable-fp-elim -fast-isel=false < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/PowerPC/structsinregs.ll b/llvm/test/CodeGen/PowerPC/structsinregs.ll
index fb3bd7cd57e..cfe32e9560a 100644
--- a/llvm/test/CodeGen/PowerPC/structsinregs.ll
+++ b/llvm/test/CodeGen/PowerPC/structsinregs.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=pwr7 -O0 -disable-fp-elim -fast-isel=false < %s | FileCheck %s
+; RUN: llc -mcpu=ppc64 -O0 -disable-fp-elim -fast-isel=false < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/PowerPC/tls-2.ll b/llvm/test/CodeGen/PowerPC/tls-2.ll
index c2faf906246..1c02fdcf229 100644
--- a/llvm/test/CodeGen/PowerPC/tls-2.ll
+++ b/llvm/test/CodeGen/PowerPC/tls-2.ll
@@ -1,6 +1,6 @@
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-freebsd10.0"
-; RUN: llc -O1 < %s -march=ppc64 | FileCheck %s
+; RUN: llc -O1 < %s -march=ppc64 -mcpu=ppc64 | FileCheck %s
@a = thread_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/PowerPC/tls.ll b/llvm/test/CodeGen/PowerPC/tls.ll
index 4e0a822399d..46910a13571 100644
--- a/llvm/test/CodeGen/PowerPC/tls.ll
+++ b/llvm/test/CodeGen/PowerPC/tls.ll
@@ -1,7 +1,7 @@
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-freebsd10.0"
-; RUN: llc -O0 < %s -march=ppc64 | FileCheck -check-prefix=OPT0 %s
-; RUN: llc -O1 < %s -march=ppc64 | FileCheck -check-prefix=OPT1 %s
+; RUN: llc -O0 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT0 %s
+; RUN: llc -O1 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT1 %s
@a = thread_local global i32 0, align 4
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