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| author | Jessica Paquette <jpaquette@apple.com> | 2019-01-28 18:34:17 +0000 |
|---|---|---|
| committer | Jessica Paquette <jpaquette@apple.com> | 2019-01-28 18:34:17 +0000 |
| commit | 296f19b3d99fe147d714fe84000fd49ea3b9987d (patch) | |
| tree | a0ec7e833f19df5ab34fbae5ebf115714bc46728 /llvm/test/CodeGen | |
| parent | 9f6afad9136fb2e43a6a61be99946e93089433ba (diff) | |
| download | bcm5719-llvm-296f19b3d99fe147d714fe84000fd49ea3b9987d.tar.gz bcm5719-llvm-296f19b3d99fe147d714fe84000fd49ea3b9987d.zip | |
[GlobalISel][AArch64] Add IRTranslator support for G_FCOS and G_FSIN
This adds IRTranslator support for the G_FCOS and G_FSIN generic instructions.
https://reviews.llvm.org/D57197
2/3
llvm-svn: 352401
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index a4b2f848a60..30b2ad357fc 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -2293,3 +2293,19 @@ define <2 x double> @test_ceil_v2f64(<2 x double> %x) { %y = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x) ret <2 x double> %y } + +declare float @llvm.cos.f32(float) +define float @test_cos_f32(float %x) { + ; CHECK-LABEL: name: test_cos_f32 + ; CHECK: %{{[0-9]+}}:_(s32) = G_FCOS %{{[0-9]+}} + %y = call float @llvm.cos.f32(float %x) + ret float %y +} + +declare float @llvm.sin.f32(float) +define float @test_sin_f32(float %x) { + ; CHECK-LABEL: name: test_sin_f32 + ; CHECK: %{{[0-9]+}}:_(s32) = G_FSIN %{{[0-9]+}} + %y = call float @llvm.sin.f32(float %x) + ret float %y +} |

