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| author | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-07-30 12:39:33 +0000 |
|---|---|---|
| committer | Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com> | 2015-07-30 12:39:33 +0000 |
| commit | 2041b1dd0bf7f155481ddbad44ac9a6441b88071 (patch) | |
| tree | 1225e51a3b1d5aa9eb08873bcaa01944acffacb7 /llvm/test/CodeGen | |
| parent | d00438e8f0d6c98e56b01c26147cb3d79df46ccb (diff) | |
| download | bcm5719-llvm-2041b1dd0bf7f155481ddbad44ac9a6441b88071.tar.gz bcm5719-llvm-2041b1dd0bf7f155481ddbad44ac9a6441b88071.zip | |
[mips][FastISel] Remove hidden mips-fast-isel option.
Summary:
This hidden option would disable code generation through FastISel by
default. It was removed from the available options and from the
Fast-ISel tests that required it in order to run the tests.
Reviewers: dsanders
Subscribers: qcolombet, llvm-commits
Differential Revision: http://reviews.llvm.org/D11610
llvm-svn: 243638
Diffstat (limited to 'llvm/test/CodeGen')
29 files changed, 61 insertions, 62 deletions
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll index 11842ddc418..a448e90187c 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/br1.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @b = global i32 1, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll index 8ac9753fa46..8f1f703ea07 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \ +; RUN: -fast-isel-abort=1 | FileCheck %s \ ; RUN: -check-prefix=ALL -check-prefix=32R1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \ +; RUN: -fast-isel-abort=1 | FileCheck %s \ ; RUN: -check-prefix=ALL -check-prefix=32R2 @a = global i16 -21829, align 2 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll b/llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll index 8f5d68b41f6..34616a50b1a 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll @@ -1,8 +1,8 @@ ; RUN: llc -march=mipsel -mcpu=mips32 -O0 \ -; RUN: -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \ +; RUN: -relocation-model=pic -fast-isel-abort=1 < %s | \ ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R1 ; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 \ -; RUN: -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \ +; RUN: -relocation-model=pic -fast-isel-abort=1 < %s | \ ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R2 declare void @xb(i8) diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll b/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll index df60d807183..d6d9074c7c1 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll @@ -1,7 +1,7 @@ ; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s +; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s ; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s +; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s @ARR = external global [10 x i32], align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/div1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/div1.ll index 89e7f211251..89055aa1280 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/div1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/div1.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s +; RUN: -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s +; RUN: -fast-isel-abort=1 | FileCheck %s @sj = global i32 200000, align 4 @sk = global i32 -47, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll index b4a9f1ce7ab..00bc7f485e0 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s %struct.x = type { i32 } diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll index 7a197b112a2..d9ce8b3964a 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll @@ -1,6 +1,5 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-verbose 2>&1 | \ -; RUN: FileCheck %s +; RUN: -fast-isel-verbose 2>&1 | FileCheck %s ; CHECK: FastISel missed call: ; CHECK-SAME: %call = call fastcc i32 @foo(i32 signext %a, i32 signext %b) diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll index 72de888b26e..e346acfeff1 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @f1 = common global float 0.000000e+00, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fpext.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fpext.ll index 5ac22490ff0..f78289f40a0 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fpext.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fpext.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @f = global float 0x40147E6B80000000, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll index a94ef508153..2c022be5b3f 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fptrunc.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fptrunc.ll index 2eec4c3ef54..89a7bfce5b0 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/fptrunc.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fptrunc.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @d = global double 0x40147E6B74DF0446, align 8 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll b/llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll index 670a8d5cfb4..fc37e118e75 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @c = global i32 4, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll index 3daf03d681c..46f7a42a5fe 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll @@ -4,9 +4,9 @@ target triple = "mips--linux-gnu" @c2 = common global i8 0, align 1 @c1 = common global i8 0, align 1 -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @s2 = common global i16 0, align 2 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll index acba132b28e..09b56d2c87e 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll @@ -1,10 +1,10 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -check-prefix=mips32r2 -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s -check-prefix=mips32 @b2 = global i8 0, align 1 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll b/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll index 9f644ecd187..1051b2800e5 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @.str = private unnamed_addr constant [6 x i8] c"hello\00", align 1 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll b/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll index 42a1c43d893..fec85092fff 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s @ub1 = common global i8 0, align 1 @ub2 = common global i8 0, align 1 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll index a3fc4a32981..b98200d7456 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \ +; RUN: -fast-isel-abort=1 | FileCheck %s \ ; RUN: -check-prefix=ALL -check-prefix=32R1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \ +; RUN: -fast-isel-abort=1 | FileCheck %s \ ; RUN: -check-prefix=ALL -check-prefix=32R2 @str = private unnamed_addr constant [12 x i8] c"hello there\00", align 1 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/mul1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/mul1.ll index 0ee044bea0a..8713e7ef1d9 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/mul1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/mul1.ll @@ -1,7 +1,5 @@ -; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 \ -; RUN: -fast-isel -mips-fast-isel -relocation-model=pic -; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 \ -; RUN: -fast-isel -mips-fast-isel -relocation-model=pic +; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic +; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic ; The test is just to make sure it is able to allocate ; registers for this example. There was an issue with allocating AC0 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll b/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll index 5fa3f13ace4..106015e30c3 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s ; Function Attrs: nounwind diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll b/llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll index 57f991e23d9..37e87b29c58 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @x = common global [128000 x float] zeroinitializer, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/rem1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/rem1.ll index 9b5e440d0ea..cf709e7e495 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/rem1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/rem1.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s +; RUN: -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ -; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s +; RUN: -fast-isel-abort=1 | FileCheck %s @sj = global i32 200, align 4 @sk = global i32 -47, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/retabi.ll b/llvm/test/CodeGen/Mips/Fast-ISel/retabi.ll index 03119b827eb..20747c4ed20 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/retabi.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/retabi.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s @i = global i32 75, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/sel1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/sel1.ll index 48614444a57..8f762b0ed08 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/sel1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/sel1.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O2 -relocation-model=pic \ -; RUN: -fast-isel -mips-fast-isel -fast-isel-abort=1 | FileCheck %s +; RUN: -fast-isel -fast-isel-abort=1 | FileCheck %s define i1 @sel_i1(i1 %j, i1 %k, i1 %l) { entry: diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll b/llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll index 90ddd190be1..bbea9c5566c 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 \ ; RUN: -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 \ ; RUN: -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s @s1 = global i16 -89, align 2 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll index df1c82700d5..9fe694bb582 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -mcpu=mips32r2 -O1 -fast-isel=true -mips-fast-isel -filetype=obj %s -o - \ +; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \ ; RUN: | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s ; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used. diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll index bcb198b1a82..627a383f597 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @abcd = external global i32 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll index f4b91d85025..62101d8ef7e 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll @@ -1,10 +1,10 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -check-prefix=mips32r2 -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s -check-prefix=mips32 @f = common global float 0.000000e+00, align 4 diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll index d8c03f22f9b..67541b54bae 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: < %s | FileCheck %s -; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: < %s | FileCheck %s @ijk = external global i32 diff --git a/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll b/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll index 779620e1012..58dd16c9f9c 100644 --- a/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll +++ b/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll @@ -1,10 +1,10 @@ ; Check that register scavenging spill slot is close to $fp. -; RUN: llc -march=mipsel -O0 < %s | FileCheck %s +; RUN: llc -march=mipsel -O0 -fast-isel=false < %s | FileCheck %s -; CHECK: sw ${{.*}}, 4($sp) -; CHECK: lw ${{.*}}, 4($sp) +; CHECK: sw ${{.*}}, 8($sp) +; CHECK: lw ${{.*}}, 8($sp) -define i32 @main(i32 signext %argc, i8** %argv) "no-frame-pointer-elim"="true" { +define i32 @main(i32 signext %argc, i8** %argv) #0 { entry: %retval = alloca i32, align 4 %argc.addr = alloca i32, align 4 @@ -30,3 +30,5 @@ entry: store <16 x i8> %mul, <16 x i8>* %result, align 16 ret i32 0 } + +attributes #0 = { noinline optnone "no-frame-pointer-elim"="true" } |

