R600/SI: Move SIFixSGPRCopies to inst selector passes

This should expose more of the actually used VALU
instructions to the machine optimization passes.

This also should help getting i1 handling into a better state.
For not entirly understood reasons, this fixes the split-scalar-i64-add.ll
test where a 64-bit add would only partially be moved to the VALU
resulting in use of undefined VCC.

llvm-svn: 222256

3 files changed, 17 insertions, 4 deletions

diff --git a/llvm/test/CodeGen/R600/i1-copy-implicit-def.ll b/llvm/test/CodeGen/R600/i1-copy-implicit-def.ll
index 4af3879ad62..7c5bc04b6cb 100644
--- a/llvm/test/CodeGen/R600/i1-copy-implicit-def.ll
+++ b/llvm/test/CodeGen/R600/i1-copy-implicit-def.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
 
 ; SILowerI1Copies was not handling IMPLICIT_DEF
-; SI-LABEL: @br_implicit_def
+; SI-LABEL: {{^}}br_implicit_def:
 ; SI: BB#0:
 ; SI-NEXT: s_and_saveexec_b64
 ; SI-NEXT: s_xor_b64
diff --git a/llvm/test/CodeGen/R600/i1-copy-phi.ll b/llvm/test/CodeGen/R600/i1-copy-phi.ll
index d987d73b521..bfa8672cb8a 100644
--- a/llvm/test/CodeGen/R600/i1-copy-phi.ll
+++ b/llvm/test/CodeGen/R600/i1-copy-phi.ll
@@ -1,6 +1,14 @@
-; XFAIL: *
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
 
+; SI-LABEL: {{^}}br_i1_phi:
+; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
+; SI: s_and_saveexec_b64
+; SI: s_xor_b64
+; SI: v_mov_b32_e32 [[REG]], -1{{$}}
+; SI: v_cmp_ne_i32_e64 {{s\[[0-9]+:[0-9]+\]}}, [[REG]], 0
+; SI: s_and_saveexec_b64
+; SI: s_xor_b64
+; SI: s_endpgm
 define void @br_i1_phi(i32 %arg, i1 %arg1) #0 {
 bb:
   br i1 %arg1, label %bb2, label %bb3
diff --git a/llvm/test/CodeGen/R600/split-scalar-i64-add.ll b/llvm/test/CodeGen/R600/split-scalar-i64-add.ll
index e9968af1be9..e3448dced91 100644
--- a/llvm/test/CodeGen/R600/split-scalar-i64-add.ll
+++ b/llvm/test/CodeGen/R600/split-scalar-i64-add.ll
@@ -1,4 +1,3 @@
-; XFAIL:*
 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
 
 declare i32 @llvm.r600.read.tidig.x() readnone
@@ -9,6 +8,8 @@ declare i32 @llvm.r600.read.tidig.x() readnone
 ; scc instead.
 
 ; FUNC-LABEL: {{^}}imp_def_vcc_split_i64_add_0:
+; SI: v_add_i32
+; SI: v_addc_u32
 define void @imp_def_vcc_split_i64_add_0(i64 addrspace(1)* %out, i32 %val) {
   %vec.0 = insertelement <2 x i32> undef, i32 %val, i32 0
   %vec.1 = insertelement <2 x i32> %vec.0, i32 999999, i32 1
@@ -19,6 +20,8 @@ define void @imp_def_vcc_split_i64_add_0(i64 addrspace(1)* %out, i32 %val) {
 }
 
 ; FUNC-LABEL: {{^}}imp_def_vcc_split_i64_add_1:
+; SI: v_add_i32
+; SI: v_addc_u32
 define void @imp_def_vcc_split_i64_add_1(i64 addrspace(1)* %out, i32 %val0, i64 %val1) {
   %vec.0 = insertelement <2 x i32> undef, i32 %val0, i32 0
   %vec.1 = insertelement <2 x i32> %vec.0, i32 99999, i32 1
@@ -30,6 +33,8 @@ define void @imp_def_vcc_split_i64_add_1(i64 addrspace(1)* %out, i32 %val0, i64
 
 ; Doesn't use constants
 ; FUNC-LABEL @imp_def_vcc_split_i64_add_2
+; SI: v_add_i32
+; SI: v_addc_u32
 define void @imp_def_vcc_split_i64_add_2(i64 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %val0, i64 %val1) {
   %tid = call i32 @llvm.r600.read.tidig.x() readnone
   %gep = getelementptr i32 addrspace(1)* %in, i32 %tid