[globalisel][tablegen] Honour priority order within nested instructions.

It appears that we haven't been prioritizing rules that contain nested
instructions properly. InstructionOperandMatcher didn't override
isHigherPriorityThan so it never compared the instructions/operands/predicates
inside nested instructions.

Fixes PR35926. Thanks to Diana Picus for the bug report.

llvm-svn: 322754

1 files changed, 40 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/ARM/GlobalISel/select-pr35926.mir b/llvm/test/CodeGen/ARM/GlobalISel/select-pr35926.mir
new file mode 100644
index 00000000000..d2b4ffa893c
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/GlobalISel/select-pr35926.mir
@@ -0,0 +1,40 @@
+# RUN: llc -mtriple arm-gnueabihf -mattr=+vfp4 -run-pass=instruction-select -global-isel -o - %s | FileCheck %s
+--- |
+  declare double @llvm.fma.f64(double, double, double) #0
+  
+  define double @vfnmsd(double %x, double %y, double %z) #1 {
+    %minus.y = fsub double -0.000000e+00, %y
+    %fma = tail call double @llvm.fma.f64(double %x, double %minus.y, double %z)
+    %minus.fma = fsub double -0.000000e+00, %fma
+    ret double %minus.fma
+  }
+  
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**) #2
+  
+  attributes #0 = { nounwind readnone speculatable "target-features"="+vfp4" }
+  attributes #1 = { "target-features"="+vfp4" }
+  attributes #2 = { nounwind }
+
+...
+---
+name:            vfnmsd
+legalized:       true
+regBankSelected: true
+selected:        false
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %d0, %d1, %d2
+  
+    %0:fprb(s64) = COPY %d0
+    %1:fprb(s64) = COPY %d1
+    %2:fprb(s64) = COPY %d2
+    %3:fprb(s64) = G_FNEG %1
+    %4:fprb(s64) = G_FMA %0, %3, %2
+    %5:fprb(s64) = G_FNEG %4
+    %d0 = COPY %5(s64)
+    MOVPCLR 14, %noreg, implicit %d0
+
+# CHECK: %{{[0-9]+}}:dpr = VFNMSD %{{[0-9]+}}, %{{[0-9]+}}, %{{[0-9]+}}, 14, %noreg
+
+...