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| author | Evan Cheng <evan.cheng@apple.com> | 2009-12-08 23:06:22 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-12-08 23:06:22 +0000 |
| commit | 0c2544fd6b309cead87cea977fe32ddbf22cca36 (patch) | |
| tree | 42e6dfeb090b0c408a30c29d018b950eb5991cd8 /llvm/test/CodeGen | |
| parent | 3a60c87a591796a35eb66fef90996336b1a9f81d (diff) | |
| download | bcm5719-llvm-0c2544fd6b309cead87cea977fe32ddbf22cca36.tar.gz bcm5719-llvm-0c2544fd6b309cead87cea977fe32ddbf22cca36.zip | |
- Support inline asm 'w' constraint for 128-bit vector types.
- Also support the 'q' NEON registers asm code.
llvm-svn: 90894
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/ARM/inlineasm3.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/inlineasm3.ll b/llvm/test/CodeGen/ARM/inlineasm3.ll new file mode 100644 index 00000000000..5ebf2fb94cc --- /dev/null +++ b/llvm/test/CodeGen/ARM/inlineasm3.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +%struct.int32x4_t = type { <4 x i32> } + +define arm_apcscc void @t() nounwind { +entry: +; CHECK: vmov.I64 q15, #0 +; CHECK: vmov.32 d30[0], r0 +; CHECK: vmov q0, q15 + %tmp = alloca %struct.int32x4_t, align 16 + call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind + ret void +} |
