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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-06-29 11:09:53 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-06-29 11:09:53 +0000
commit0afe97f48022394eae85d4c5de54c91042be56c3 (patch)
treea25cafb38750e856b2ccf511a3d4e5428328ab36 /llvm/test/CodeGen
parent91539ce2d3971353005c6409af093399b9efed44 (diff)
downloadbcm5719-llvm-0afe97f48022394eae85d4c5de54c91042be56c3.tar.gz
bcm5719-llvm-0afe97f48022394eae85d4c5de54c91042be56c3.zip
[X86][SSE] Dropped -mcpu from vector shift tests
Use triple and attribute only for consistency llvm-svn: 306662
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/X86/lower-vec-shift.ll7
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/lower-vec-shift.ll b/llvm/test/CodeGen/X86/lower-vec-shift.ll
index 783cda0a8dd..8d64baf5f2a 100644
--- a/llvm/test/CodeGen/X86/lower-vec-shift.ll
+++ b/llvm/test/CodeGen/X86/lower-vec-shift.ll
@@ -1,8 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2
-
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2
; Verify that the following shifts are lowered into a sequence of two shifts plus
; a blend. On pre-avx2 targets, instead of scalarizing logical and arithmetic
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