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| author | Nikita Popov <nikita.ppv@gmail.com> | 2019-02-19 17:37:55 +0000 |
|---|---|---|
| committer | Nikita Popov <nikita.ppv@gmail.com> | 2019-02-19 17:37:55 +0000 |
| commit | 04e45e93114bfb1210b053e07f74c622de7a74ce (patch) | |
| tree | fc5f44e9a29269f9aac7bc441019c1a93a066fc9 /llvm/test/CodeGen | |
| parent | dce9c2a8119c7eb3dd34bc8178e54dd609e6d785 (diff) | |
| download | bcm5719-llvm-04e45e93114bfb1210b053e07f74c622de7a74ce.tar.gz bcm5719-llvm-04e45e93114bfb1210b053e07f74c622de7a74ce.zip | |
[SDAG] Use shift amount type in MULO promotion; NFC
Directly use the correct shift amount type if it is possible, and
future-proof the code against vectors. The added test makes sure that
bitwidths that do not fit into the shift amount type do not assert.
Split out from D57997.
llvm-svn: 354359
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/umul-with-overflow.ll | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/umul-with-overflow.ll b/llvm/test/CodeGen/X86/umul-with-overflow.ll index 64a8933346e..c2a0dc047bc 100644 --- a/llvm/test/CodeGen/X86/umul-with-overflow.ll +++ b/llvm/test/CodeGen/X86/umul-with-overflow.ll @@ -68,3 +68,12 @@ entry: %tmp2 = extractvalue { i32, i1 } %tmp1, 0 ret i32 %tmp2 } + +; Check that shifts larger than the shift amount type are handled. +; Intentionally not testing codegen here, only that this doesn't assert. +declare {i300, i1} @llvm.umul.with.overflow.i300(i300 %a, i300 %b) +define i300 @test4(i300 %a, i300 %b) nounwind { + %x = call {i300, i1} @llvm.umul.with.overflow.i300(i300 %a, i300 %b) + %y = extractvalue {i300, i1} %x, 0 + ret i300 %y +} |
