diff options
| author | David Blaikie <dblaikie@gmail.com> | 2013-06-16 20:34:15 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2013-06-16 20:34:15 +0000 |
| commit | 0252265be09bcd94c72cea95e21a773b3ea1c638 (patch) | |
| tree | 8a36a32a3f4d9d42ada095959fcf6cdc2ebc598d /llvm/test/CodeGen | |
| parent | 80d055494973e23dda00914c8f214e289831a341 (diff) | |
| download | bcm5719-llvm-0252265be09bcd94c72cea95e21a773b3ea1c638.tar.gz bcm5719-llvm-0252265be09bcd94c72cea95e21a773b3ea1c638.zip | |
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in
DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
reduces the complexity of debug info handling down to two
representations of values (reg+offset and frame index+offset) rather
than three or four.
Ideally we could ensure that frame indicies had been eliminated by the
time we reached an assembly or dwarf generation, but I haven't spent the
time to figure out where the FIs are leaking through into that & whether
there's a good place to convert them. Some FI+offset=>reg+offset
conversion is done (see PrologEpilogInserter, for example) which is
necessary for some SelectionDAG assumptions about registers, I believe,
but it might be possible to make this a more thorough conversion &
ensure there are no remaining FIs no matter how instruction selection
is performed.
llvm-svn: 184066
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/ARM/debug-info-arg.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/debug-info-blocks.ll | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/debug-info-arg.ll b/llvm/test/CodeGen/ARM/debug-info-arg.ll index bb33eb69507..099b851af0d 100644 --- a/llvm/test/CodeGen/ARM/debug-info-arg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-arg.ll @@ -11,7 +11,7 @@ define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13), !dbg !21 tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14), !dbg !22 tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17), !dbg !23 -;CHECK: @DEBUG_VALUE: foo:y <- [R7+4294967295] +;CHECK: @DEBUG_VALUE: foo:y <- [R7+8] tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18), !dbg !24 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19), !dbg !25 %1 = icmp eq %struct.tag_s* %c, null, !dbg !26 diff --git a/llvm/test/CodeGen/ARM/debug-info-blocks.ll b/llvm/test/CodeGen/ARM/debug-info-blocks.ll index d0bfecc5af4..fc21860cd53 100644 --- a/llvm/test/CodeGen/ARM/debug-info-blocks.ll +++ b/llvm/test/CodeGen/ARM/debug-info-blocks.ll @@ -1,5 +1,5 @@ ; RUN: llc -O0 < %s | FileCheck %s -; CHECK: @DEBUG_VALUE: mydata <- [sp+#{{[0-9]+}}]+#0 +; CHECK: @DEBUG_VALUE: mydata <- [SP+{{[0-9]+}}] ; Radar 9331779 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-ios" |
