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| author | Pavel Chupin <pavel.v.chupin@intel.com> | 2014-08-20 11:59:22 +0000 |
|---|---|---|
| committer | Pavel Chupin <pavel.v.chupin@intel.com> | 2014-08-20 11:59:22 +0000 |
| commit | 01a4e0a1ef710f8980ca459b9fe550f6e348d9b4 (patch) | |
| tree | ce4cffdef9a4fe093dbddd18eb799c1f58d1a0b7 /llvm/test/CodeGen | |
| parent | c655f0c898ab43e8986ba1d47f66837c529e6c8a (diff) | |
| download | bcm5719-llvm-01a4e0a1ef710f8980ca459b9fe550f6e348d9b4.tar.gz bcm5719-llvm-01a4e0a1ef710f8980ca459b9fe550f6e348d9b4.zip | |
[x32] Fix FrameIndex check in SelectLEA64_32Addr
Summary:
Fixes http://llvm.org/bugs/show_bug.cgi?id=20016 reproducible on new
lea-5.ll case.
Also use RSP/RBP for x32 lea to save 1 byte used for 0x67 prefix in
ESP/EBP case.
Test Plan: lea tests modified to include x32/nacl and new test added
Reviewers: nadav, dschuff, t.p.northover
Subscribers: llvm-commits, zinovy.nis
Differential Revision: http://reviews.llvm.org/D4929
llvm-svn: 216065
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/lea-2.ll | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/lea-3.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/lea-4.ll | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/lea-5.ll | 59 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/lea.ll | 2 |
5 files changed, 71 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/lea-2.ll b/llvm/test/CodeGen/X86/lea-2.ll index 82cefb728c6..6fb387975c1 100644 --- a/llvm/test/CodeGen/X86/lea-2.ll +++ b/llvm/test/CodeGen/X86/lea-2.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-nacl -x86-asm-syntax=intel | FileCheck %s define i32 @test1(i32 %A, i32 %B) { %tmp1 = shl i32 %A, 2 diff --git a/llvm/test/CodeGen/X86/lea-3.ll b/llvm/test/CodeGen/X86/lea-3.ll index c439ee1d06e..a56403a24b0 100644 --- a/llvm/test/CodeGen/X86/lea-3.ll +++ b/llvm/test/CodeGen/X86/lea-3.ll @@ -1,4 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; CHECK: leaq (,[[A0:%rdi|%rcx]],4), %rax diff --git a/llvm/test/CodeGen/X86/lea-4.ll b/llvm/test/CodeGen/X86/lea-4.ll index cef47264a58..00c2278c54b 100644 --- a/llvm/test/CodeGen/X86/lea-4.ll +++ b/llvm/test/CodeGen/X86/lea-4.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s + define zeroext i16 @t1(i32 %on_off) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/lea-5.ll b/llvm/test/CodeGen/X86/lea-5.ll new file mode 100644 index 00000000000..50d3aaf4c59 --- /dev/null +++ b/llvm/test/CodeGen/X86/lea-5.ll @@ -0,0 +1,59 @@ +; test for more complicated forms of lea operands which can be generated +; in loop optimized cases. +; See also http://llvm.org/bugs/show_bug.cgi?id=20016 + +; RUN: llc < %s -mtriple=x86_64-linux -O2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -O2 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-nacl -O2 | FileCheck %s -check-prefix=X32 + +; Function Attrs: nounwind readnone uwtable +define void @foo(i32 %x, i32 %d) #0 { +entry: + %a = alloca [8 x i32], align 16 + br label %while.cond + +while.cond: ; preds = %while.cond, %entry + %d.addr.0 = phi i32 [ %d, %entry ], [ %inc, %while.cond ] + %arrayidx = getelementptr inbounds [8 x i32]* %a, i32 0, i32 %d.addr.0 + +; CHECK: leaq -40(%rsp,%r{{[^,]*}},4), %rax +; X32: leal -40(%rsp,%r{{[^,]*}},4), %eax + %0 = load i32* %arrayidx, align 4 + %cmp1 = icmp eq i32 %0, 0 + %inc = add nsw i32 %d.addr.0, 1 + +; CHECK: leaq 4(%r{{[^,]*}}), %r{{[^,]*}} +; X32: leal 4(%r{{[^,]*}}), %e{{[^,]*}} + br i1 %cmp1, label %while.end, label %while.cond + +while.end: ; preds = %while.cond + ret void +} + +; The same test as above but with enforsed stack realignment (%a aligned by 64) +; to check one more case of correct lea generation. + +; Function Attrs: nounwind readnone uwtable +define void @bar(i32 %x, i32 %d) #0 { +entry: + %a = alloca [8 x i32], align 64 + br label %while.cond + +while.cond: ; preds = %while.cond, %entry + %d.addr.0 = phi i32 [ %d, %entry ], [ %inc, %while.cond ] + %arrayidx = getelementptr inbounds [8 x i32]* %a, i32 0, i32 %d.addr.0 + +; CHECK: leaq (%rsp,%r{{[^,]*}},4), %rax +; X32: leal (%rsp,%r{{[^,]*}},4), %eax + %0 = load i32* %arrayidx, align 4 + %cmp1 = icmp eq i32 %0, 0 + %inc = add nsw i32 %d.addr.0, 1 + +; CHECK: leaq 4(%r{{[^,]*}}), %r{{[^,]*}} +; X32: leal 4(%r{{[^,]*}}), %e{{[^,]*}} + br i1 %cmp1, label %while.end, label %while.cond + +while.end: ; preds = %while.cond + ret void +} + diff --git a/llvm/test/CodeGen/X86/lea.ll b/llvm/test/CodeGen/X86/lea.ll index 93cfe4611b4..9b6632c9469 100644 --- a/llvm/test/CodeGen/X86/lea.ll +++ b/llvm/test/CodeGen/X86/lea.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s define i32 @test1(i32 %x) nounwind { %tmp1 = shl i32 %x, 3 |

