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| author | Andrew Trick <atrick@apple.com> | 2014-02-26 23:22:49 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2014-02-26 23:22:49 +0000 |
| commit | 9f240f742b9dc03a0e3ea0ee56f700c5c49dc532 (patch) | |
| tree | d12d08182f8c3c2c8730cabe91893bacb2070c3a /llvm/test/CodeGen/XCore/atomic.ll | |
| parent | cfa657795dedb36524cd8ed8e27b3f9765df6cca (diff) | |
| download | bcm5719-llvm-9f240f742b9dc03a0e3ea0ee56f700c5c49dc532.tar.gz bcm5719-llvm-9f240f742b9dc03a0e3ea0ee56f700c5c49dc532.zip | |
Use regnum regex in an XCore test case.
llvm-svn: 202315
Diffstat (limited to 'llvm/test/CodeGen/XCore/atomic.ll')
| -rw-r--r-- | llvm/test/CodeGen/XCore/atomic.ll | 38 |
1 files changed, 18 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/XCore/atomic.ll b/llvm/test/CodeGen/XCore/atomic.ll index 59a63014d06..58ef38bd3f6 100644 --- a/llvm/test/CodeGen/XCore/atomic.ll +++ b/llvm/test/CodeGen/XCore/atomic.ll @@ -1,6 +1,4 @@ ; RUN: llc < %s -march=xcore | FileCheck %s -; XFAIL: * -; I am currently fixing this test case. ; CHECK-LABEL: atomic_fence ; CHECK: #MEMBARRIER @@ -23,18 +21,18 @@ define void @atomicloadstore() nounwind { entry: ; CHECK-LABEL: atomicloadstore -; CHECK: ldw r0, dp[pool] +; CHECK: ldw r[[R0:[0-9]+]], dp[pool] ; CHECK-NEXT: #MEMBARRIER %0 = load atomic i32* bitcast (i64* @pool to i32*) acquire, align 4 -; CHECK-NEXT: ldaw r1, dp[pool] -; CHECK-NEXT: ldc r2, 0 +; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool] +; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0 -; CHECK-NEXT: ld16s r3, r1[r2] +; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]] ; CHECK-NEXT: #MEMBARRIER %1 = load atomic i16* bitcast (i64* @pool to i16*) acquire, align 2 -; CHECK-NEXT: ld8u r11, r1[r2] +; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]] ; CHECK-NEXT: #MEMBARRIER %2 = load atomic i8* bitcast (i64* @pool to i8*) acquire, align 1 @@ -42,24 +40,24 @@ entry: ; CHECK-NEXT: #MEMBARRIER %3 = load atomic i32* bitcast (i64* @pool to i32*) seq_cst, align 4 -; CHECK-NEXT: ld16s r5, r1[r2] +; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]] ; CHECK-NEXT: #MEMBARRIER %4 = load atomic i16* bitcast (i64* @pool to i16*) seq_cst, align 2 -; CHECK-NEXT: ld8u r6, r1[r2] +; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]] ; CHECK-NEXT: #MEMBARRIER %5 = load atomic i8* bitcast (i64* @pool to i8*) seq_cst, align 1 ; CHECK-NEXT: #MEMBARRIER -; CHECK-NEXT: stw r0, dp[pool] +; CHECK-NEXT: stw r[[R0]], dp[pool] store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4 ; CHECK-NEXT: #MEMBARRIER -; CHECK-NEXT: st16 r3, r1[r2] +; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]] store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2 ; CHECK-NEXT: #MEMBARRIER -; CHECK-NEXT: st8 r11, r1[r2] +; CHECK-NEXT: st8 r11, r[[R1]][r[[R2]]] store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1 ; CHECK-NEXT: #MEMBARRIER @@ -68,21 +66,21 @@ entry: store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4 ; CHECK-NEXT: #MEMBARRIER -; CHECK-NEXT: st16 r5, r1[r2] +; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]] ; CHECK-NEXT: #MEMBARRIER store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2 ; CHECK-NEXT: #MEMBARRIER -; CHECK-NEXT: st8 r6, r1[r2] +; CHECK-NEXT: st8 r6, r[[R1]][r[[R2]]] ; CHECK-NEXT: #MEMBARRIER store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1 -; CHECK-NEXT: ldw r0, dp[pool] -; CHECK-NEXT: stw r0, dp[pool] -; CHECK-NEXT: ld16s r0, r1[r2] -; CHECK-NEXT: st16 r0, r1[r2] -; CHECK-NEXT: ld8u r0, r1[r2] -; CHECK-NEXT: st8 r0, r1[r2] +; CHECK-NEXT: ldw r[[R0]], dp[pool] +; CHECK-NEXT: stw r[[R0]], dp[pool] +; CHECK-NEXT: ld16s r[[R0]], r[[R1]][r[[R2]]] +; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]] +; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]] +; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]] %6 = load atomic i32* bitcast (i64* @pool to i32*) monotonic, align 4 store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4 %7 = load atomic i16* bitcast (i64* @pool to i16*) monotonic, align 2 |
