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authorIgor Breger <igor.breger@intel.com>2017-03-28 09:35:06 +0000
committerIgor Breger <igor.breger@intel.com>2017-03-28 09:35:06 +0000
commitf580fce2c34461433e404b5dacad87a483d1164e (patch)
tree5c533c1f5f9e146363ca5289e657ce8be4ae3cb9 /llvm/test/CodeGen/X86
parent923e574bff006ea6a6888e1900ecc4d4a2a4ef41 (diff)
downloadbcm5719-llvm-f580fce2c34461433e404b5dacad87a483d1164e.tar.gz
bcm5719-llvm-f580fce2c34461433e404b5dacad87a483d1164e.zip
[GlobalISel][X86] support G_FRAME_INDEX instruction selection.
Summary: G_LOAD/G_STORE, add alternative RegisterBank mapping. For G_LOAD, Fast and Greedy mode choose the same RegisterBank mapping (GprRegBank ) for the G_GLOAD + G_FADD , can't get rid of cross register bank copy GprRegBank->VecRegBank. Reviewers: zvi, rovka, qcolombet, ab Reviewed By: zvi Subscribers: llvm-commits, dberris, kristof.beyls, eladcohen, guyblank Differential Revision: https://reviews.llvm.org/D30979 llvm-svn: 298907
Diffstat (limited to 'llvm/test/CodeGen/X86')
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir54
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/binop-isel.ll8
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/memop-isel.ll86
3 files changed, 99 insertions, 49 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir b/llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir
index 49066e950c4..e9a0957845a 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir
@@ -1,4 +1,5 @@
-# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=regbankselect %s -o - | FileCheck %s
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -regbankselect-greedy -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=GREEDY
--- |
; ModuleID = 'tmp.ll'
@@ -36,14 +37,14 @@
ret double %ret
}
- define <4 x i32> @test_add_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) {
- %ret = add <4 x i32> %arg1, %arg2
- ret <4 x i32> %ret
+ define <4 x i32> @test_add_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) {
+ %ret = add <4 x i32> %arg1, %arg2
+ ret <4 x i32> %ret
}
- define <4 x float> @test_add_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
- %ret = fadd <4 x float> %arg1, %arg2
- ret <4 x float> %ret
+ define <4 x float> @test_add_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
+ %ret = fadd <4 x float> %arg1, %arg2
+ ret <4 x float> %ret
}
define i8 @test_load_i8(i8* %p1) {
@@ -536,9 +537,13 @@ regBankSelected: false
selected: false
# CHECK-LABEL: name: test_store_float
# CHECK: registers:
-# CHECK: - { id: 0, class: vecr }
-# CHECK: - { id: 1, class: gpr }
-# CHECK: - { id: 2, class: gpr }
+
+# FAST-NEXT: - { id: 0, class: vecr }
+# FAST-NEXT: - { id: 1, class: gpr }
+# FAST-NEXT: - { id: 2, class: gpr }
+
+# GREEDY-NEXT: - { id: 0, class: vecr }
+# GREEDY-NEXT: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
@@ -549,8 +554,13 @@ body: |
%0(s32) = COPY %xmm0
%1(p0) = COPY %rdi
- ; CHECK: %2(s32) = COPY %0(s32)
- ; CHECK: G_STORE %2(s32), %1(p0) :: (store 4 into %ir.p1)
+ ; CHECK: %1(p0) = COPY %rdi
+
+ ; FAST-NEXT: %2(s32) = COPY %0(s32)
+ ; FAST-NEXT: G_STORE %2(s32), %1(p0) :: (store 4 into %ir.p1)
+
+ ; GREEDY-NEXT: G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
+
G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
%rax = COPY %1(p0)
RET 0, implicit %rax
@@ -564,9 +574,13 @@ regBankSelected: false
selected: false
# CHECK-LABEL: name: test_store_double
# CHECK: registers:
-# CHECK: - { id: 0, class: vecr }
-# CHECK: - { id: 1, class: gpr }
-# CHECK: - { id: 2, class: gpr }
+
+# FAST-NEXT: - { id: 0, class: vecr }
+# FAST-NEXT: - { id: 1, class: gpr }
+# FAST-NEXT: - { id: 2, class: gpr }
+
+# GREEDY-NEXT: - { id: 0, class: vecr }
+# GREEDY-NEXT: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
@@ -577,8 +591,14 @@ body: |
%0(s64) = COPY %xmm0
%1(p0) = COPY %rdi
- ; CHECK: %2(s64) = COPY %0(s64)
- ; CHECK: G_STORE %2(s64), %1(p0) :: (store 8 into %ir.p1)
+
+ ; CHECK: %1(p0) = COPY %rdi
+
+ ; FAST-NEXT: %2(s64) = COPY %0(s64)
+ ; FAST-NEXT: G_STORE %2(s64), %1(p0) :: (store 8 into %ir.p1)
+
+ ; GREEDY-NEXT: G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
+
G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
%rax = COPY %1(p0)
RET 0, implicit %rax
diff --git a/llvm/test/CodeGen/X86/GlobalISel/binop-isel.ll b/llvm/test/CodeGen/X86/GlobalISel/binop-isel.ll
index 39bebcd28a0..8499dd95844 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/binop-isel.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/binop-isel.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512F
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512VL
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512F
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512VL
define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
; ALL-LABEL: test_add_i64:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/memop-isel.ll b/llvm/test/CodeGen/X86/GlobalISel/memop-isel.ll
index 33561b100fd..6fe66436e4a 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/memop-isel.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/memop-isel.ll
@@ -1,8 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512F
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512VL
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE_FAST
+; RUN: llc -mtriple=x86_64-linux-gnu -regbankselect-greedy -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE_GREEDY
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=ALL_AVX_FAST --check-prefix=AVX_FAST
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -regbankselect-greedy -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=ALL_AVX_GREEDY --check-prefix=AVX_GREEDY
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=ALL_AVX_FAST --check-prefix=AVX512F_FAST
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -regbankselect-greedy -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=ALL_AVX_GREEDY --check-prefix=AVX512F_GREEDY
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=ALL_AVX_FAST --check-prefix=AVX512VL_FAST
+; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -regbankselect-greedy -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=ALL_AVX_GREEDY --check-prefix=AVX512VL_GREEDY
define i8 @test_load_i8(i8 * %p1) {
@@ -122,37 +126,63 @@ define i64 * @test_store_i64(i64 %val, i64 * %p1) {
}
define float * @test_store_float(float %val, float * %p1) {
-; SSE-LABEL: test_store_float:
-; SSE: # BB#0:
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: movl %eax, (%rdi)
-; SSE-NEXT: movq %rdi, %rax
-; SSE-NEXT: retq
;
-; ALL_AVX-LABEL: test_store_float:
-; ALL_AVX: # BB#0:
-; ALL_AVX-NEXT: vmovd %xmm0, %eax
-; ALL_AVX-NEXT: movl %eax, (%rdi)
-; ALL_AVX-NEXT: movq %rdi, %rax
-; ALL_AVX-NEXT: retq
+; SSE_FAST-LABEL: test_store_float:
+; SSE_FAST: # BB#0:
+; SSE_FAST-NEXT: movd %xmm0, %eax
+; SSE_FAST-NEXT: movl %eax, (%rdi)
+; SSE_FAST-NEXT: movq %rdi, %rax
+; SSE_FAST-NEXT: retq
+;
+; SSE_GREEDY-LABEL: test_store_float:
+; SSE_GREEDY: # BB#0:
+; SSE_GREEDY-NEXT: movss %xmm0, (%rdi)
+; SSE_GREEDY-NEXT: movq %rdi, %rax
+; SSE_GREEDY-NEXT: retq
+;
+; ALL_AVX_FAST-LABEL: test_store_float:
+; ALL_AVX_FAST: # BB#0:
+; ALL_AVX_FAST-NEXT: vmovd %xmm0, %eax
+; ALL_AVX_FAST-NEXT: movl %eax, (%rdi)
+; ALL_AVX_FAST-NEXT: movq %rdi, %rax
+; ALL_AVX_FAST-NEXT: retq
+;
+; ALL_AVX_GREEDY-LABEL: test_store_float:
+; ALL_AVX_GREEDY: # BB#0:
+; ALL_AVX_GREEDY-NEXT: vmovss %xmm0, (%rdi)
+; ALL_AVX_GREEDY-NEXT: movq %rdi, %rax
+; ALL_AVX_GREEDY-NEXT: retq
store float %val, float* %p1
ret float * %p1;
}
define double * @test_store_double(double %val, double * %p1) {
-; SSE-LABEL: test_store_double:
-; SSE: # BB#0:
-; SSE-NEXT: movd %xmm0, %rax
-; SSE-NEXT: movq %rax, (%rdi)
-; SSE-NEXT: movq %rdi, %rax
-; SSE-NEXT: retq
;
-; ALL_AVX-LABEL: test_store_double:
-; ALL_AVX: # BB#0:
-; ALL_AVX-NEXT: vmovq %xmm0, %rax
-; ALL_AVX-NEXT: movq %rax, (%rdi)
-; ALL_AVX-NEXT: movq %rdi, %rax
-; ALL_AVX-NEXT: retq
+; SSE_FAST-LABEL: test_store_double:
+; SSE_FAST: # BB#0:
+; SSE_FAST-NEXT: movd %xmm0, %rax
+; SSE_FAST-NEXT: movq %rax, (%rdi)
+; SSE_FAST-NEXT: movq %rdi, %rax
+; SSE_FAST-NEXT: retq
+;
+; SSE_GREEDY-LABEL: test_store_double:
+; SSE_GREEDY: # BB#0:
+; SSE_GREEDY-NEXT: movsd %xmm0, (%rdi)
+; SSE_GREEDY-NEXT: movq %rdi, %rax
+; SSE_GREEDY-NEXT: retq
+;
+; ALL_AVX_FAST-LABEL: test_store_double:
+; ALL_AVX_FAST: # BB#0:
+; ALL_AVX_FAST-NEXT: vmovq %xmm0, %rax
+; ALL_AVX_FAST-NEXT: movq %rax, (%rdi)
+; ALL_AVX_FAST-NEXT: movq %rdi, %rax
+; ALL_AVX_FAST-NEXT: retq
+;
+; ALL_AVX_GREEDY-LABEL: test_store_double:
+; ALL_AVX_GREEDY: # BB#0:
+; ALL_AVX_GREEDY-NEXT: vmovsd %xmm0, (%rdi)
+; ALL_AVX_GREEDY-NEXT: movq %rdi, %rax
+; ALL_AVX_GREEDY-NEXT: retq
store double %val, double* %p1
ret double * %p1;
}
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