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| author | Sanjay Patel <spatel@rotateright.com> | 2019-01-10 15:04:52 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2019-01-10 15:04:52 +0000 |
| commit | ed5cfc6792a8a5ac2b90fc114ff1447d609604e3 (patch) | |
| tree | 200135d68a4f2283156f0888e67c5af4942555b7 /llvm/test/CodeGen/X86 | |
| parent | 7ce5775e62e2a9dda851f3a60620aa41b3e35c22 (diff) | |
| download | bcm5719-llvm-ed5cfc6792a8a5ac2b90fc114ff1447d609604e3.tar.gz bcm5719-llvm-ed5cfc6792a8a5ac2b90fc114ff1447d609604e3.zip | |
[x86] fix horizontal binop matching for 256-bit vectors (PR40243)
This is a partial fix for:
https://bugs.llvm.org/show_bug.cgi?id=40243
...as seen in the integer test, we still need to correct the result when using the
existing (old) horizontal op matching function because it does not model the way
x86 256-bit horizontal ops return results (each 128-bit half is its own horizontal-op).
A potential follow-up change for that is discussed in the bug report - see also D56490.
This generally duplicates a lot of the existing matching code, but we can't just remove
that without introducing regressions, so the existing code is renamed and used less often.
Follow-ups may try to reduce that overlap.
Differential Revision: https://reviews.llvm.org/D56450
llvm-svn: 350826
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/haddsub-undef.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/phaddsub-undef.ll | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/X86/haddsub-undef.ll b/llvm/test/CodeGen/X86/haddsub-undef.ll index a5c59910f8b..c7cee4ec314 100644 --- a/llvm/test/CodeGen/X86/haddsub-undef.ll +++ b/llvm/test/CodeGen/X86/haddsub-undef.ll @@ -300,7 +300,7 @@ define <8 x float> @test11_undef(<8 x float> %a, <8 x float> %b) { ; ; AVX-LABEL: test11_undef: ; AVX: # %bb.0: -; AVX-NEXT: vhaddps %ymm0, %ymm0, %ymm0 +; AVX-NEXT: vhaddps %ymm1, %ymm0, %ymm0 ; AVX-NEXT: retq %vecext = extractelement <8 x float> %a, i32 0 %vecext1 = extractelement <8 x float> %a, i32 1 @@ -934,12 +934,12 @@ define <8 x float> @v16f32_inputs_v8f32_output_4567(<16 x float> %a, <16 x float ; ; AVX1-SLOW-LABEL: v16f32_inputs_v8f32_output_4567: ; AVX1-SLOW: # %bb.0: -; AVX1-SLOW-NEXT: vhaddps %ymm0, %ymm0, %ymm0 +; AVX1-SLOW-NEXT: vhaddps %ymm2, %ymm0, %ymm0 ; AVX1-SLOW-NEXT: retq ; ; AVX1-FAST-LABEL: v16f32_inputs_v8f32_output_4567: ; AVX1-FAST: # %bb.0: -; AVX1-FAST-NEXT: vhaddps %ymm0, %ymm0, %ymm0 +; AVX1-FAST-NEXT: vhaddps %ymm2, %ymm0, %ymm0 ; AVX1-FAST-NEXT: retq ; ; AVX512-LABEL: v16f32_inputs_v8f32_output_4567: @@ -973,7 +973,7 @@ define <8 x float> @PR40243(<8 x float> %a, <8 x float> %b) { ; ; AVX-LABEL: PR40243: ; AVX: # %bb.0: -; AVX-NEXT: vhaddps %ymm0, %ymm0, %ymm0 +; AVX-NEXT: vhaddps %ymm1, %ymm0, %ymm0 ; AVX-NEXT: retq %a4 = extractelement <8 x float> %a, i32 4 %a5 = extractelement <8 x float> %a, i32 5 diff --git a/llvm/test/CodeGen/X86/phaddsub-undef.ll b/llvm/test/CodeGen/X86/phaddsub-undef.ll index a2212ed1b29..c827665400a 100644 --- a/llvm/test/CodeGen/X86/phaddsub-undef.ll +++ b/llvm/test/CodeGen/X86/phaddsub-undef.ll @@ -75,12 +75,12 @@ define <8 x i32> @test15_undef(<8 x i32> %a, <8 x i32> %b) { ; ; AVX2-LABEL: test15_undef: ; AVX2: # %bb.0: -; AVX2-NEXT: vphaddd %ymm0, %ymm0, %ymm0 +; AVX2-NEXT: vphaddd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: test15_undef: ; AVX512: # %bb.0: -; AVX512-NEXT: vphaddd %ymm0, %ymm0, %ymm0 +; AVX512-NEXT: vphaddd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %vecext = extractelement <8 x i32> %a, i32 0 %vecext1 = extractelement <8 x i32> %a, i32 1 @@ -105,12 +105,12 @@ define <8 x i32> @PR40243_alt(<8 x i32> %a, <8 x i32> %b) { ; ; AVX2-LABEL: PR40243_alt: ; AVX2: # %bb.0: -; AVX2-NEXT: vphaddd %ymm0, %ymm0, %ymm0 +; AVX2-NEXT: vphaddd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: PR40243_alt: ; AVX512: # %bb.0: -; AVX512-NEXT: vphaddd %ymm0, %ymm0, %ymm0 +; AVX512-NEXT: vphaddd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %a4 = extractelement <8 x i32> %a, i32 4 %a5 = extractelement <8 x i32> %a, i32 5 |
