diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-01-23 05:37:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-23 05:37:00 +0000 |
| commit | e5aea259809d5bd828acdcaa54de2eff5dcc74dc (patch) | |
| tree | 73f5fcd624952fbfdc2448aae839566c6af09784 /llvm/test/CodeGen/X86 | |
| parent | 26a701f24f5e8ff0c2c2d0692148ee702b31d63f (diff) | |
| download | bcm5719-llvm-e5aea259809d5bd828acdcaa54de2eff5dcc74dc.tar.gz bcm5719-llvm-e5aea259809d5bd828acdcaa54de2eff5dcc74dc.zip | |
[X86] Remove 'NOREX' comment from the printing of _NOREX instructions.
Some of the NOREX instructions are used in 32-bit mode making this printing confusing. It also doesn't provide a lot of value since you can see the h-register being used by the instruction.
llvm-svn: 323174
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/bmi.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/bypass-slow-division-32.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/divrem.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/divrem8_ext.ll | 36 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/extract-store.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/h-registers-1.ll | 32 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/popcnt.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/tbm_patterns.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/urem-power-of-two.ll | 4 |
9 files changed, 50 insertions, 50 deletions
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll index b855b89183b..be130a62a68 100644 --- a/llvm/test/CodeGen/X86/bmi.ll +++ b/llvm/test/CodeGen/X86/bmi.ll @@ -316,7 +316,7 @@ define i32 @bextr32_subreg(i32 %x) uwtable ssp { ; CHECK-LABEL: bextr32_subreg: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retq %1 = lshr i32 %x, 8 %2 = and i32 %1, 255 @@ -374,7 +374,7 @@ define i64 @bextr64_subreg(i64 %x) uwtable ssp { ; CHECK-LABEL: bextr64_subreg: ; CHECK: # %bb.0: ; CHECK-NEXT: movq %rdi, %rax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retq %1 = lshr i64 %x, 8 %2 = and i64 %1, 255 diff --git a/llvm/test/CodeGen/X86/bypass-slow-division-32.ll b/llvm/test/CodeGen/X86/bypass-slow-division-32.ll index a3a07519b3e..c5a519163ec 100644 --- a/llvm/test/CodeGen/X86/bypass-slow-division-32.ll +++ b/llvm/test/CodeGen/X86/bypass-slow-division-32.ll @@ -43,7 +43,7 @@ define i32 @Test_get_remainder(i32 %a, i32 %b) nounwind { ; CHECK-NEXT: movzbl %al, %eax ; CHECK-NEXT: # kill: def %eax killed %eax def %ax ; CHECK-NEXT: divb %cl -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retl %result = srem i32 %a, %b ret i32 %result @@ -67,7 +67,7 @@ define i32 @Test_get_quotient_and_remainder(i32 %a, i32 %b) nounwind { ; CHECK-NEXT: movzbl %al, %eax ; CHECK-NEXT: # kill: def %eax killed %eax def %ax ; CHECK-NEXT: divb %cl -; CHECK-NEXT: movzbl %ah, %edx # NOREX +; CHECK-NEXT: movzbl %ah, %edx ; CHECK-NEXT: movzbl %al, %eax ; CHECK-NEXT: addl %edx, %eax ; CHECK-NEXT: retl diff --git a/llvm/test/CodeGen/X86/divrem.ll b/llvm/test/CodeGen/X86/divrem.ll index 6648d34aa0f..99d5261c8e0 100644 --- a/llvm/test/CodeGen/X86/divrem.ll +++ b/llvm/test/CodeGen/X86/divrem.ll @@ -122,7 +122,7 @@ define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind { ; X32-NEXT: movb {{[0-9]+}}(%esp), %al ; X32-NEXT: cbtw ; X32-NEXT: idivb {{[0-9]+}}(%esp) -; X32-NEXT: movsbl %ah, %ebx # NOREX +; X32-NEXT: movsbl %ah, %ebx ; X32-NEXT: movb %al, (%edx) ; X32-NEXT: movb %bl, (%ecx) ; X32-NEXT: popl %ebx @@ -133,7 +133,7 @@ define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind { ; X64-NEXT: movl %edi, %eax ; X64-NEXT: cbtw ; X64-NEXT: idivb %sil -; X64-NEXT: movsbl %ah, %esi # NOREX +; X64-NEXT: movsbl %ah, %esi ; X64-NEXT: movb %al, (%rdx) ; X64-NEXT: movb %sil, (%rcx) ; X64-NEXT: retq @@ -264,7 +264,7 @@ define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind { ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X32-NEXT: # kill: def %eax killed %eax def %ax ; X32-NEXT: divb {{[0-9]+}}(%esp) -; X32-NEXT: movzbl %ah, %ebx # NOREX +; X32-NEXT: movzbl %ah, %ebx ; X32-NEXT: movb %al, (%edx) ; X32-NEXT: movb %bl, (%ecx) ; X32-NEXT: popl %ebx @@ -275,7 +275,7 @@ define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %esi # NOREX +; X64-NEXT: movzbl %ah, %esi ; X64-NEXT: movb %al, (%rdx) ; X64-NEXT: movb %sil, (%rcx) ; X64-NEXT: retq diff --git a/llvm/test/CodeGen/X86/divrem8_ext.ll b/llvm/test/CodeGen/X86/divrem8_ext.ll index 8b6590141e1..6b729eeeac3 100644 --- a/llvm/test/CodeGen/X86/divrem8_ext.ll +++ b/llvm/test/CodeGen/X86/divrem8_ext.ll @@ -8,7 +8,7 @@ define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) { ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X32-NEXT: # kill: def %eax killed %eax def %ax ; X32-NEXT: divb {{[0-9]+}}(%esp) -; X32-NEXT: movzbl %ah, %ecx # NOREX +; X32-NEXT: movzbl %ah, %ecx ; X32-NEXT: movb %al, z ; X32-NEXT: movl %ecx, %eax ; X32-NEXT: retl @@ -18,7 +18,7 @@ define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %ecx # NOREX +; X64-NEXT: movzbl %ah, %ecx ; X64-NEXT: movb %al, {{.*}}(%rip) ; X64-NEXT: movl %ecx, %eax ; X64-NEXT: retq @@ -34,7 +34,7 @@ define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) { ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X32-NEXT: # kill: def %eax killed %eax def %ax ; X32-NEXT: divb {{[0-9]+}}(%esp) -; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: movzbl %ah, %eax ; X32-NEXT: # kill: def %al killed %al killed %eax ; X32-NEXT: retl ; @@ -43,7 +43,7 @@ define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: movzbl %ah, %eax ; X64-NEXT: # kill: def %al killed %al killed %eax ; X64-NEXT: retq %1 = urem i8 %x, %y @@ -57,7 +57,7 @@ define i8 @test_urem_noext_ah(i8 %x, i8 %y) { ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X32-NEXT: # kill: def %eax killed %eax def %ax ; X32-NEXT: divb %cl -; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: movzbl %ah, %eax ; X32-NEXT: addb %cl, %al ; X32-NEXT: # kill: def %al killed %al killed %eax ; X32-NEXT: retl @@ -67,7 +67,7 @@ define i8 @test_urem_noext_ah(i8 %x, i8 %y) { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: movzbl %ah, %eax ; X64-NEXT: addb %sil, %al ; X64-NEXT: # kill: def %al killed %al killed %eax ; X64-NEXT: retq @@ -82,7 +82,7 @@ define i64 @test_urem_zext64_ah(i8 %x, i8 %y) { ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X32-NEXT: # kill: def %eax killed %eax def %ax ; X32-NEXT: divb {{[0-9]+}}(%esp) -; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: movzbl %ah, %eax ; X32-NEXT: xorl %edx, %edx ; X32-NEXT: retl ; @@ -91,7 +91,7 @@ define i64 @test_urem_zext64_ah(i8 %x, i8 %y) { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: movzbl %ah, %eax ; X64-NEXT: retq %1 = urem i8 %x, %y %2 = zext i8 %1 to i64 @@ -104,7 +104,7 @@ define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) { ; X32-NEXT: movb {{[0-9]+}}(%esp), %al ; X32-NEXT: cbtw ; X32-NEXT: idivb {{[0-9]+}}(%esp) -; X32-NEXT: movsbl %ah, %ecx # NOREX +; X32-NEXT: movsbl %ah, %ecx ; X32-NEXT: movb %al, z ; X32-NEXT: movl %ecx, %eax ; X32-NEXT: retl @@ -114,7 +114,7 @@ define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) { ; X64-NEXT: movl %edi, %eax ; X64-NEXT: cbtw ; X64-NEXT: idivb %sil -; X64-NEXT: movsbl %ah, %ecx # NOREX +; X64-NEXT: movsbl %ah, %ecx ; X64-NEXT: movb %al, {{.*}}(%rip) ; X64-NEXT: movl %ecx, %eax ; X64-NEXT: retq @@ -130,7 +130,7 @@ define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) { ; X32-NEXT: movb {{[0-9]+}}(%esp), %al ; X32-NEXT: cbtw ; X32-NEXT: idivb {{[0-9]+}}(%esp) -; X32-NEXT: movsbl %ah, %eax # NOREX +; X32-NEXT: movsbl %ah, %eax ; X32-NEXT: # kill: def %al killed %al killed %eax ; X32-NEXT: retl ; @@ -139,7 +139,7 @@ define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) { ; X64-NEXT: movl %edi, %eax ; X64-NEXT: cbtw ; X64-NEXT: idivb %sil -; X64-NEXT: movsbl %ah, %eax # NOREX +; X64-NEXT: movsbl %ah, %eax ; X64-NEXT: # kill: def %al killed %al killed %eax ; X64-NEXT: retq %1 = srem i8 %x, %y @@ -153,7 +153,7 @@ define i8 @test_srem_noext_ah(i8 %x, i8 %y) { ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl ; X32-NEXT: cbtw ; X32-NEXT: idivb %cl -; X32-NEXT: movsbl %ah, %eax # NOREX +; X32-NEXT: movsbl %ah, %eax ; X32-NEXT: addb %cl, %al ; X32-NEXT: # kill: def %al killed %al killed %eax ; X32-NEXT: retl @@ -163,7 +163,7 @@ define i8 @test_srem_noext_ah(i8 %x, i8 %y) { ; X64-NEXT: movl %edi, %eax ; X64-NEXT: cbtw ; X64-NEXT: idivb %sil -; X64-NEXT: movsbl %ah, %eax # NOREX +; X64-NEXT: movsbl %ah, %eax ; X64-NEXT: addb %sil, %al ; X64-NEXT: # kill: def %al killed %al killed %eax ; X64-NEXT: retq @@ -178,7 +178,7 @@ define i64 @test_srem_sext64_ah(i8 %x, i8 %y) { ; X32-NEXT: movb {{[0-9]+}}(%esp), %al ; X32-NEXT: cbtw ; X32-NEXT: idivb {{[0-9]+}}(%esp) -; X32-NEXT: movsbl %ah, %eax # NOREX +; X32-NEXT: movsbl %ah, %eax ; X32-NEXT: movl %eax, %edx ; X32-NEXT: sarl $31, %edx ; X32-NEXT: retl @@ -188,7 +188,7 @@ define i64 @test_srem_sext64_ah(i8 %x, i8 %y) { ; X64-NEXT: movl %edi, %eax ; X64-NEXT: cbtw ; X64-NEXT: idivb %sil -; X64-NEXT: movsbl %ah, %eax # NOREX +; X64-NEXT: movsbl %ah, %eax ; X64-NEXT: cltq ; X64-NEXT: retq %1 = srem i8 %x, %y @@ -202,7 +202,7 @@ define i64 @pr25754(i8 %a, i8 %c) { ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X32-NEXT: # kill: def %eax killed %eax def %ax ; X32-NEXT: divb {{[0-9]+}}(%esp) -; X32-NEXT: movzbl %ah, %ecx # NOREX +; X32-NEXT: movzbl %ah, %ecx ; X32-NEXT: movzbl %al, %eax ; X32-NEXT: addl %ecx, %eax ; X32-NEXT: xorl %edx, %edx @@ -213,7 +213,7 @@ define i64 @pr25754(i8 %a, i8 %c) { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %ecx # NOREX +; X64-NEXT: movzbl %ah, %ecx ; X64-NEXT: movzbl %al, %eax ; X64-NEXT: addq %rcx, %rax ; X64-NEXT: retq diff --git a/llvm/test/CodeGen/X86/extract-store.ll b/llvm/test/CodeGen/X86/extract-store.ll index 0601c773fa5..871d66d6e84 100644 --- a/llvm/test/CodeGen/X86/extract-store.ll +++ b/llvm/test/CodeGen/X86/extract-store.ll @@ -114,7 +114,7 @@ define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) nounwind { ; SSE2-X64-LABEL: extract_i8_15: ; SSE2-X64: # %bb.0: ; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax -; SSE2-X64-NEXT: movb %ah, (%rdi) # NOREX +; SSE2-X64-NEXT: movb %ah, (%rdi) ; SSE2-X64-NEXT: retq ; ; SSE41-X32-LABEL: extract_i8_15: @@ -142,7 +142,7 @@ define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) nounwind { ; SSE-F128-LABEL: extract_i8_15: ; SSE-F128: # %bb.0: ; SSE-F128-NEXT: pextrw $7, %xmm0, %eax -; SSE-F128-NEXT: movb %ah, (%rdi) # NOREX +; SSE-F128-NEXT: movb %ah, (%rdi) ; SSE-F128-NEXT: retq %vecext = extractelement <16 x i8> %foo, i32 15 store i8 %vecext, i8* %dst, align 1 diff --git a/llvm/test/CodeGen/X86/h-registers-1.ll b/llvm/test/CodeGen/X86/h-registers-1.ll index 9daf563455d..43b086819a2 100644 --- a/llvm/test/CodeGen/X86/h-registers-1.ll +++ b/llvm/test/CodeGen/X86/h-registers-1.ll @@ -18,20 +18,20 @@ define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h) ; CHECK-NEXT: .cfi_offset %rbp, -16 ; CHECK-NEXT: movq %rsi, %rax ; CHECK-NEXT: movq %rdi, %rbx -; CHECK-NEXT: movzbl %bh, %esi # NOREX -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %bh, %esi +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: movq %rax, %r10 -; CHECK-NEXT: movzbl %dh, %edx # NOREX -; CHECK-NEXT: movzbl %ch, %eax # NOREX +; CHECK-NEXT: movzbl %dh, %edx +; CHECK-NEXT: movzbl %ch, %eax ; CHECK-NEXT: movq %rax, %r11 ; CHECK-NEXT: movq %r8, %rax -; CHECK-NEXT: movzbl %ah, %ecx # NOREX +; CHECK-NEXT: movzbl %ah, %ecx ; CHECK-NEXT: movq %r9, %rax -; CHECK-NEXT: movzbl %ah, %ebp # NOREX +; CHECK-NEXT: movzbl %ah, %ebp ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %ebx -; CHECK-NEXT: movzbl %bh, %edi # NOREX +; CHECK-NEXT: movzbl %bh, %edi ; CHECK-NEXT: movq %r10, %r8 ; CHECK-NEXT: addq %r8, %rsi ; CHECK-NEXT: addq %r11, %rdx @@ -54,20 +54,20 @@ define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h) ; GNUX32-NEXT: .cfi_offset %rbp, -16 ; GNUX32-NEXT: movq %rsi, %rax ; GNUX32-NEXT: movq %rdi, %rbx -; GNUX32-NEXT: movzbl %bh, %esi # NOREX -; GNUX32-NEXT: movzbl %ah, %eax # NOREX +; GNUX32-NEXT: movzbl %bh, %esi +; GNUX32-NEXT: movzbl %ah, %eax ; GNUX32-NEXT: movq %rax, %r10 -; GNUX32-NEXT: movzbl %dh, %edx # NOREX -; GNUX32-NEXT: movzbl %ch, %eax # NOREX +; GNUX32-NEXT: movzbl %dh, %edx +; GNUX32-NEXT: movzbl %ch, %eax ; GNUX32-NEXT: movq %rax, %r11 ; GNUX32-NEXT: movq %r8, %rax -; GNUX32-NEXT: movzbl %ah, %ecx # NOREX +; GNUX32-NEXT: movzbl %ah, %ecx ; GNUX32-NEXT: movq %r9, %rax -; GNUX32-NEXT: movzbl %ah, %ebp # NOREX +; GNUX32-NEXT: movzbl %ah, %ebp ; GNUX32-NEXT: movl {{[0-9]+}}(%esp), %eax -; GNUX32-NEXT: movzbl %ah, %eax # NOREX +; GNUX32-NEXT: movzbl %ah, %eax ; GNUX32-NEXT: movl {{[0-9]+}}(%esp), %ebx -; GNUX32-NEXT: movzbl %bh, %edi # NOREX +; GNUX32-NEXT: movzbl %bh, %edi ; GNUX32-NEXT: movq %r10, %r8 ; GNUX32-NEXT: addq %r8, %rsi ; GNUX32-NEXT: addq %r11, %rdx diff --git a/llvm/test/CodeGen/X86/popcnt.ll b/llvm/test/CodeGen/X86/popcnt.ll index 478ec1bcec8..d11a676ad88 100644 --- a/llvm/test/CodeGen/X86/popcnt.ll +++ b/llvm/test/CodeGen/X86/popcnt.ll @@ -77,7 +77,7 @@ define i16 @cnt16(i16 %x) nounwind readnone { ; X32-NEXT: movl %ecx, %eax ; X32-NEXT: shll $8, %eax ; X32-NEXT: addl %ecx, %eax -; X32-NEXT: movzbl %ah, %eax # NOREX +; X32-NEXT: movzbl %ah, %eax ; X32-NEXT: # kill: def %ax killed %ax killed %eax ; X32-NEXT: retl ; @@ -99,7 +99,7 @@ define i16 @cnt16(i16 %x) nounwind readnone { ; X64-NEXT: movl %eax, %ecx ; X64-NEXT: shll $8, %ecx ; X64-NEXT: addl %eax, %ecx -; X64-NEXT: movzbl %ch, %eax # NOREX +; X64-NEXT: movzbl %ch, %eax ; X64-NEXT: # kill: def %ax killed %ax killed %eax ; X64-NEXT: retq ; diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll index fd33e7bb211..5fdfd57fb36 100644 --- a/llvm/test/CodeGen/X86/tbm_patterns.ll +++ b/llvm/test/CodeGen/X86/tbm_patterns.ll @@ -18,7 +18,7 @@ define i32 @test_x86_tbm_bextri_u32_subreg(i32 %a) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u32_subreg: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retq %t0 = lshr i32 %a, 8 %t1 = and i32 %t0, 255 @@ -79,7 +79,7 @@ define i64 @test_x86_tbm_bextri_u64_subreg(i64 %a) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u64_subreg: ; CHECK: # %bb.0: ; CHECK-NEXT: movq %rdi, %rax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retq %t0 = lshr i64 %a, 8 %t1 = and i64 %t0, 255 diff --git a/llvm/test/CodeGen/X86/urem-power-of-two.ll b/llvm/test/CodeGen/X86/urem-power-of-two.ll index 2610beda415..6760239cf59 100644 --- a/llvm/test/CodeGen/X86/urem-power-of-two.ll +++ b/llvm/test/CodeGen/X86/urem-power-of-two.ll @@ -83,7 +83,7 @@ define i8 @and_pow_2(i8 %x, i8 %y) { ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; X86-NEXT: # kill: def %eax killed %eax def %ax ; X86-NEXT: divb %cl -; X86-NEXT: movzbl %ah, %eax # NOREX +; X86-NEXT: movzbl %ah, %eax ; X86-NEXT: # kill: def %al killed %al killed %eax ; X86-NEXT: retl ; @@ -93,7 +93,7 @@ define i8 @and_pow_2(i8 %x, i8 %y) { ; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: # kill: def %eax killed %eax def %ax ; X64-NEXT: divb %sil -; X64-NEXT: movzbl %ah, %eax # NOREX +; X64-NEXT: movzbl %ah, %eax ; X64-NEXT: # kill: def %al killed %al killed %eax ; X64-NEXT: retq %and = and i8 %y, 4 |

