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authorCameron McInally <cameron.mcinally@nyu.edu>2013-11-04 19:14:56 +0000
committerCameron McInally <cameron.mcinally@nyu.edu>2013-11-04 19:14:56 +0000
commitd80f7d34dec2c02c949bd3e4761d7b7a77e2be8b (patch)
tree8b0ccb07ca07fbcce93d943a140bde10997e9028 /llvm/test/CodeGen/X86
parent3d46ac66d8a6aa8558cfa5df879056d1ca5308f5 (diff)
downloadbcm5719-llvm-d80f7d34dec2c02c949bd3e4761d7b7a77e2be8b.tar.gz
bcm5719-llvm-d80f7d34dec2c02c949bd3e4761d7b7a77e2be8b.zip
Add support for AVX512 masked vector blend intrinsics.
llvm-svn: 194006
Diffstat (limited to 'llvm/test/CodeGen/X86')
-rw-r--r--llvm/test/CodeGen/X86/avx512-intrinsics.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-intrinsics.ll
index 0570b21e78e..5bdabf23499 100644
--- a/llvm/test/CodeGen/X86/avx512-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512-intrinsics.ll
@@ -340,3 +340,35 @@ define <8 x i64> @test_mask_conflict_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
ret <8 x i64> %res
}
declare <8 x i64> @llvm.x86.avx512.conflict.q.mask.512(<8 x i64>, <8 x i1>,<8 x i64>) nounwind readonly
+
+define <16 x float> @test_x86_mskblend_ps_512(i16 %a0, <16 x float> %a1, <16 x float> %a2) {
+ ; CHECK: vblendmps
+ %m0 = bitcast i16 %a0 to <16 x i1>
+ %res = call <16 x float> @llvm.x86.avx512.mskblend.ps.512(<16 x i1> %m0, <16 x float> %a1, <16 x float> %a2) ; <<16 x float>> [#uses=1]
+ ret <16 x float> %res
+}
+declare <16 x float> @llvm.x86.avx512.mskblend.ps.512(<16 x i1> %a0, <16 x float> %a1, <16 x float> %a2) nounwind readonly
+
+define <8 x double> @test_x86_mskblend_pd_512(i8 %a0, <8 x double> %a1, <8 x double> %a2) {
+ ; CHECK: vblendmpd
+ %m0 = bitcast i8 %a0 to <8 x i1>
+ %res = call <8 x double> @llvm.x86.avx512.mskblend.pd.512(<8 x i1> %m0, <8 x double> %a1, <8 x double> %a2) ; <<8 x double>> [#uses=1]
+ ret <8 x double> %res
+}
+declare <8 x double> @llvm.x86.avx512.mskblend.pd.512(<8 x i1> %a0, <8 x double> %a1, <8 x double> %a2) nounwind readonly
+
+define <16 x i32> @test_x86_mskblend_d_512(i16 %a0, <16 x i32> %a1, <16 x i32> %a2) {
+ ; CHECK: vpblendmd
+ %m0 = bitcast i16 %a0 to <16 x i1>
+ %res = call <16 x i32> @llvm.x86.avx512.mskblend.d.512(<16 x i1> %m0, <16 x i32> %a1, <16 x i32> %a2) ; <<16 x i32>> [#uses=1]
+ ret <16 x i32> %res
+}
+declare <16 x i32> @llvm.x86.avx512.mskblend.d.512(<16 x i1> %a0, <16 x i32> %a1, <16 x i32> %a2) nounwind readonly
+
+define <8 x i64> @test_x86_mskblend_q_512(i8 %a0, <8 x i64> %a1, <8 x i64> %a2) {
+ ; CHECK: vpblendmq
+ %m0 = bitcast i8 %a0 to <8 x i1>
+ %res = call <8 x i64> @llvm.x86.avx512.mskblend.q.512(<8 x i1> %m0, <8 x i64> %a1, <8 x i64> %a2) ; <<8 x i64>> [#uses=1]
+ ret <8 x i64> %res
+}
+declare <8 x i64> @llvm.x86.avx512.mskblend.q.512(<8 x i1> %a0, <8 x i64> %a1, <8 x i64> %a2) nounwind readonly
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