summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2019-02-24 15:31:27 +0000
committerSanjay Patel <spatel@rotateright.com>2019-02-24 15:31:27 +0000
commitcb04ba032f573fe75fce0e813ba11b0d47f1159e (patch)
tree4719accf69c48c7cd3df700168b0d34f5329e80a /llvm/test/CodeGen/X86
parent9b49f36a036a53d2cc600527a8b403cd48f7e411 (diff)
downloadbcm5719-llvm-cb04ba032f573fe75fce0e813ba11b0d47f1159e.tar.gz
bcm5719-llvm-cb04ba032f573fe75fce0e813ba11b0d47f1159e.zip
[CGP] add special-cases to form unsigned add with overflow (PR40486)
There's likely a missed IR canonicalization for at least 1 of these patterns. Otherwise, we wouldn't have needed the pattern-matching enhancement in D57516. Note that -- unlike usubo added with D57789 -- the TLI hook for this transform defaults to 'on'. So if there's any perf fallout from this, targets should look at how they're lowering the uaddo node in SDAG and/or override that hook. The x86 diffs suggest that there's some missing pattern-matching for forming inc/dec. This should fix the remaining known problems in: https://bugs.llvm.org/show_bug.cgi?id=40486 https://bugs.llvm.org/show_bug.cgi?id=31754 llvm-svn: 354746
Diffstat (limited to 'llvm/test/CodeGen/X86')
-rw-r--r--llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll27
-rw-r--r--llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll11
2 files changed, 14 insertions, 24 deletions
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll b/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll
index 921f0da3b8d..2c4435bbb03 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll
@@ -229,12 +229,7 @@ define void @test_18446744073709551614(i64*, i64*) {
define void @test_18446744073709551615(i64*, i64*) {
; CHECK-LABEL: test_18446744073709551615:
; CHECK: # %bb.0:
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: leaq -1(%rax), %rcx
-; CHECK-NEXT: movq %rcx, (%rdi)
-; CHECK-NEXT: testq %rax, %rax
-; CHECK-NEXT: setne %al
-; CHECK-NEXT: addb $-1, %al
+; CHECK-NEXT: addq $-1, (%rdi)
; CHECK-NEXT: adcq $0, (%rsi)
; CHECK-NEXT: retq
%3 = load i64, i64* %0, align 8
@@ -272,10 +267,9 @@ define i1 @illegal_type(i17 %x, i17* %p) {
define i1 @uaddo_i64_increment_alt(i64 %x, i64* %p) {
; CHECK-LABEL: uaddo_i64_increment_alt:
; CHECK: # %bb.0:
-; CHECK-NEXT: leaq 1(%rdi), %rax
-; CHECK-NEXT: movq %rax, (%rsi)
-; CHECK-NEXT: cmpq $-1, %rdi
+; CHECK-NEXT: incq %rdi
; CHECK-NEXT: sete %al
+; CHECK-NEXT: movq %rdi, (%rsi)
; CHECK-NEXT: retq
%a = add i64 %x, 1
store i64 %a, i64* %p
@@ -288,9 +282,8 @@ define i1 @uaddo_i64_increment_alt(i64 %x, i64* %p) {
define i1 @uaddo_i64_increment_alt_dom(i64 %x, i64* %p) {
; CHECK-LABEL: uaddo_i64_increment_alt_dom:
; CHECK: # %bb.0:
-; CHECK-NEXT: cmpq $-1, %rdi
-; CHECK-NEXT: sete %al
; CHECK-NEXT: incq %rdi
+; CHECK-NEXT: sete %al
; CHECK-NEXT: movq %rdi, (%rsi)
; CHECK-NEXT: retq
%ov = icmp eq i64 %x, -1
@@ -304,10 +297,9 @@ define i1 @uaddo_i64_increment_alt_dom(i64 %x, i64* %p) {
define i1 @uaddo_i64_decrement_alt(i64 %x, i64* %p) {
; CHECK-LABEL: uaddo_i64_decrement_alt:
; CHECK: # %bb.0:
-; CHECK-NEXT: leaq -1(%rdi), %rax
-; CHECK-NEXT: movq %rax, (%rsi)
-; CHECK-NEXT: testq %rdi, %rdi
-; CHECK-NEXT: setne %al
+; CHECK-NEXT: addq $-1, %rdi
+; CHECK-NEXT: setb %al
+; CHECK-NEXT: movq %rdi, (%rsi)
; CHECK-NEXT: retq
%a = add i64 %x, -1
store i64 %a, i64* %p
@@ -320,9 +312,8 @@ define i1 @uaddo_i64_decrement_alt(i64 %x, i64* %p) {
define i1 @uaddo_i64_decrement_alt_dom(i64 %x, i64* %p) {
; CHECK-LABEL: uaddo_i64_decrement_alt_dom:
; CHECK: # %bb.0:
-; CHECK-NEXT: testq %rdi, %rdi
-; CHECK-NEXT: setne %al
-; CHECK-NEXT: decq %rdi
+; CHECK-NEXT: addq $-1, %rdi
+; CHECK-NEXT: setb %al
; CHECK-NEXT: movq %rdi, (%rsi)
; CHECK-NEXT: retq
%ov = icmp ne i64 %x, 0
diff --git a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
index 410d736af73..a2fc94d70fd 100644
--- a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
+++ b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
@@ -68,13 +68,12 @@ define i32 @test2() nounwind uwtable ssp {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: movq {{.*}}(%rip), %rax
-; CHECK-NEXT: leaq -1(%rax), %rsi
+; CHECK-NEXT: movq {{.*}}(%rip), %rsi
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: addq $-1, %rsi
+; CHECK-NEXT: setb %al
; CHECK-NEXT: movq %rsi, {{.*}}(%rip)
-; CHECK-NEXT: xorl %ecx, %ecx
-; CHECK-NEXT: testq %rax, %rax
-; CHECK-NEXT: setne %cl
-; CHECK-NEXT: movl %ecx, {{.*}}(%rip)
+; CHECK-NEXT: movl %eax, {{.*}}(%rip)
; CHECK-NEXT: movl $.L.str, %edi
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: callq printf
OpenPOWER on IntegriCloud