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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-26 16:24:13 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-26 16:24:13 +0000 |
| commit | 8815105cd5e4da0890af76eb27a533ca741366f7 (patch) | |
| tree | 47773e8037355322f26fed7d2cc2691d83862b9e /llvm/test/CodeGen/X86 | |
| parent | f13bbf1d5891272583e803ebce798b3dbdacc353 (diff) | |
| download | bcm5719-llvm-8815105cd5e4da0890af76eb27a533ca741366f7.tar.gz bcm5719-llvm-8815105cd5e4da0890af76eb27a533ca741366f7.zip | |
[X86][Btver2] Add CVTSD2SS/CVTSS2SD scheduler costs
llvm-svn: 328541
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/sse2-schedule.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/X86/sse2-schedule.ll b/llvm/test/CodeGen/X86/sse2-schedule.ll index a944fc4e7c8..5b258929ab8 100644 --- a/llvm/test/CodeGen/X86/sse2-schedule.ll +++ b/llvm/test/CodeGen/X86/sse2-schedule.ll @@ -2218,17 +2218,17 @@ define float @test_cvtsd2ss(double %a0, double *%a1) { ; ; BTVER2-SSE-LABEL: test_cvtsd2ss: ; BTVER2-SSE: # %bb.0: -; BTVER2-SSE-NEXT: cvtsd2ss %xmm0, %xmm1 # sched: [3:1.00] +; BTVER2-SSE-NEXT: cvtsd2ss %xmm0, %xmm1 # sched: [7:2.00] ; BTVER2-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero sched: [5:1.00] -; BTVER2-SSE-NEXT: cvtsd2ss %xmm0, %xmm0 # sched: [3:1.00] +; BTVER2-SSE-NEXT: cvtsd2ss %xmm0, %xmm0 # sched: [7:2.00] ; BTVER2-SSE-NEXT: addss %xmm1, %xmm0 # sched: [3:1.00] ; BTVER2-SSE-NEXT: retq # sched: [4:1.00] ; ; BTVER2-LABEL: test_cvtsd2ss: ; BTVER2: # %bb.0: +; BTVER2-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 # sched: [7:2.00] ; BTVER2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero sched: [5:1.00] -; BTVER2-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 # sched: [3:1.00] -; BTVER2-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1 # sched: [3:1.00] +; BTVER2-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1 # sched: [7:2.00] ; BTVER2-NEXT: vaddss %xmm1, %xmm0, %xmm0 # sched: [3:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -2616,17 +2616,17 @@ define double @test_cvtss2sd(float %a0, float *%a1) { ; ; BTVER2-SSE-LABEL: test_cvtss2sd: ; BTVER2-SSE: # %bb.0: -; BTVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm1 # sched: [3:1.00] +; BTVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm1 # sched: [7:2.00] ; BTVER2-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [5:1.00] -; BTVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm0 # sched: [3:1.00] +; BTVER2-SSE-NEXT: cvtss2sd %xmm0, %xmm0 # sched: [7:2.00] ; BTVER2-SSE-NEXT: addsd %xmm1, %xmm0 # sched: [3:1.00] ; BTVER2-SSE-NEXT: retq # sched: [4:1.00] ; ; BTVER2-LABEL: test_cvtss2sd: ; BTVER2: # %bb.0: +; BTVER2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 # sched: [7:2.00] ; BTVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:1.00] -; BTVER2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 # sched: [3:1.00] -; BTVER2-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 # sched: [3:1.00] +; BTVER2-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 # sched: [7:2.00] ; BTVER2-NEXT: vaddsd %xmm1, %xmm0, %xmm0 # sched: [3:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; |
