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| author | Sanjay Patel <spatel@rotateright.com> | 2016-10-21 17:24:26 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-10-21 17:24:26 +0000 |
| commit | 81029f6a762527c7f31840b5a48e828e46358b43 (patch) | |
| tree | 8a55d7388151805de84f3009d1d84fe0dd0c2df4 /llvm/test/CodeGen/X86 | |
| parent | 9fb40e3bbdf4d01f3c527725608b83adc3579d90 (diff) | |
| download | bcm5719-llvm-81029f6a762527c7f31840b5a48e828e46358b43.tar.gz bcm5719-llvm-81029f6a762527c7f31840b5a48e828e46358b43.zip | |
[DAG] fold negation of sign-bit
0 - X --> 0, if the sub is NUW
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW
0 - X --> X, if X is 0 or the minimum signed value
This is the DAG equivalent of:
https://reviews.llvm.org/rL284649
plus the fold for the NUW case which already existed in InstSimplify.
Note that we miss a vector fold because of a deficiency in the DAG version of
computeKnownBits().
llvm-svn: 284844
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/negate.ll | 17 |
1 files changed, 4 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/X86/negate.ll b/llvm/test/CodeGen/X86/negate.ll index 2734a0f4e18..e42794d184e 100644 --- a/llvm/test/CodeGen/X86/negate.ll +++ b/llvm/test/CodeGen/X86/negate.ll @@ -4,8 +4,7 @@ define i32 @negate_nuw(i32 %x) { ; CHECK-LABEL: negate_nuw: ; CHECK: # BB#0: -; CHECK-NEXT: negl %edi -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: retq ; %neg = sub nuw i32 0, %x @@ -15,9 +14,7 @@ define i32 @negate_nuw(i32 %x) { define <4 x i32> @negate_nuw_vec(<4 x i32> %x) { ; CHECK-LABEL: negate_nuw_vec: ; CHECK: # BB#0: -; CHECK-NEXT: pxor %xmm1, %xmm1 -; CHECK-NEXT: psubd %xmm0, %xmm1 -; CHECK-NEXT: movdqa %xmm1, %xmm0 +; CHECK-NEXT: xorps %xmm0, %xmm0 ; CHECK-NEXT: retq ; %neg = sub nuw <4 x i32> zeroinitializer, %x @@ -27,9 +24,7 @@ define <4 x i32> @negate_nuw_vec(<4 x i32> %x) { define i8 @negate_zero_or_minsigned_nsw(i8 %x) { ; CHECK-LABEL: negate_zero_or_minsigned_nsw: ; CHECK: # BB#0: -; CHECK-NEXT: andb $-128, %dil -; CHECK-NEXT: negb %dil -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: retq ; %signbit = and i8 %x, 128 @@ -55,7 +50,6 @@ define i8 @negate_zero_or_minsigned(i8 %x) { ; CHECK-LABEL: negate_zero_or_minsigned: ; CHECK: # BB#0: ; CHECK-NEXT: shlb $7, %dil -; CHECK-NEXT: negb %dil ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: retq ; @@ -67,10 +61,7 @@ define i8 @negate_zero_or_minsigned(i8 %x) { define <4 x i32> @negate_zero_or_minsigned_vec(<4 x i32> %x) { ; CHECK-LABEL: negate_zero_or_minsigned_vec: ; CHECK: # BB#0: -; CHECK-NEXT: pand {{.*}}(%rip), %xmm0 -; CHECK-NEXT: pxor %xmm1, %xmm1 -; CHECK-NEXT: psubd %xmm0, %xmm1 -; CHECK-NEXT: movdqa %xmm1, %xmm0 +; CHECK-NEXT: andps {{.*}}(%rip), %xmm0 ; CHECK-NEXT: retq ; %signbit = and <4 x i32> %x, <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648> |
