[DAGCombiner] Add add/sub saturation undef handling

Match ConstantFolding.cpp:
(add_sat x, undef) -> -1
(sub_sat x, undef) -> 0

llvm-svn: 351070

4 files changed, 13 insertions, 33 deletions

diff --git a/llvm/test/CodeGen/X86/combine-add-ssat.ll b/llvm/test/CodeGen/X86/combine-add-ssat.ll
index bd06ae9de64..c2612530558 100644
--- a/llvm/test/CodeGen/X86/combine-add-ssat.ll
+++ b/llvm/test/CodeGen/X86/combine-add-ssat.ll
@@ -15,13 +15,7 @@ declare  <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
 define i32 @combine_undef_i32(i32 %a0) {
 ; CHECK-LABEL: combine_undef_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    addl %eax, %ecx
-; CHECK-NEXT:    setns %al
-; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    addl %eax, %edi
-; CHECK-NEXT:    cmovnol %edi, %eax
+; CHECK-NEXT:    movl $-1, %eax
 ; CHECK-NEXT:    retq
   %res = call i32 @llvm.sadd.sat.i32(i32 %a0, i32 undef)
   ret i32 %res
@@ -30,12 +24,12 @@ define i32 @combine_undef_i32(i32 %a0) {
 define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_undef_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    paddsw %xmm0, %xmm0
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_undef_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpaddsw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> undef, <8 x i16> %a0)
   ret <8 x i16> %res
@@ -68,14 +62,12 @@ define <8 x i16> @combine_constfold_v8i16() {
 define <8 x i16> @combine_constfold_undef_v8i16() {
 ; SSE-LABEL: combine_constfold_undef_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    movdqa {{.*#+}} xmm0 = <u,1,u,65535,65535,65281,32776,1>
-; SSE-NEXT:    paddsw {{.*}}(%rip), %xmm0
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65535,65535,65534,0,65280,32768,0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_constfold_undef_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <u,1,u,65535,65535,65281,32776,1>
-; AVX-NEXT:    vpaddsw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65535,65535,65535,65534,0,65280,32768,0]
 ; AVX-NEXT:    retq
   %res = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> <i16 undef, i16 1, i16 undef, i16 65535, i16 -1, i16 -255, i16 -32760, i16 1>, <8 x i16> <i16 1, i16 undef, i16 undef, i16 65535, i16 1, i16 65535, i16 -10, i16 65535>)
   ret <8 x i16> %res
diff --git a/llvm/test/CodeGen/X86/combine-add-usat.ll b/llvm/test/CodeGen/X86/combine-add-usat.ll
index 260d6ba00e5..7565f0624b1 100644
--- a/llvm/test/CodeGen/X86/combine-add-usat.ll
+++ b/llvm/test/CodeGen/X86/combine-add-usat.ll
@@ -15,9 +15,7 @@ declare  <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16>, <8 x i16>)
 define i32 @combine_undef_i32(i32 %a0) {
 ; CHECK-LABEL: combine_undef_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    addl %eax, %edi
 ; CHECK-NEXT:    movl $-1, %eax
-; CHECK-NEXT:    cmovael %edi, %eax
 ; CHECK-NEXT:    retq
   %res = call i32 @llvm.uadd.sat.i32(i32 %a0, i32 undef)
   ret i32 %res
@@ -26,12 +24,12 @@ define i32 @combine_undef_i32(i32 %a0) {
 define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_undef_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    paddusw %xmm0, %xmm0
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_undef_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpaddusw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %res = call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> undef, <8 x i16> %a0)
   ret <8 x i16> %res
@@ -64,14 +62,12 @@ define <8 x i16> @combine_constfold_v8i16() {
 define <8 x i16> @combine_constfold_undef_v8i16() {
 ; SSE-LABEL: combine_constfold_undef_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    movdqa {{.*#+}} xmm0 = <u,1,u,65535,65535,65281,1,1>
-; SSE-NEXT:    paddusw {{.*}}(%rip), %xmm0
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65535,65535,65535,65535,65535,2,65535]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_constfold_undef_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <u,1,u,65535,65535,65281,1,1>
-; AVX-NEXT:    vpaddusw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65535,65535,65535,65535,65535,65535,2,65535]
 ; AVX-NEXT:    retq
   %res = call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> <i16 undef, i16 1, i16 undef, i16 65535, i16 -1, i16 -255, i16 -65535, i16 1>, <8 x i16> <i16 1, i16 undef, i16 undef, i16 65535, i16 1, i16 65535, i16 1, i16 65535>)
   ret <8 x i16> %res
diff --git a/llvm/test/CodeGen/X86/combine-sub-ssat.ll b/llvm/test/CodeGen/X86/combine-sub-ssat.ll
index 423efd2b181..eb146df5eb7 100644
--- a/llvm/test/CodeGen/X86/combine-sub-ssat.ll
+++ b/llvm/test/CodeGen/X86/combine-sub-ssat.ll
@@ -16,12 +16,6 @@ define i32 @combine_undef_i32(i32 %a0) {
 ; CHECK-LABEL: combine_undef_i32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    subl %eax, %ecx
-; CHECK-NEXT:    setns %al
-; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    subl %eax, %edi
-; CHECK-NEXT:    cmovnol %edi, %eax
 ; CHECK-NEXT:    retq
   %res = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 undef)
   ret i32 %res
@@ -30,12 +24,12 @@ define i32 @combine_undef_i32(i32 %a0) {
 define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_undef_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    psubsw %xmm0, %xmm0
+; SSE-NEXT:    xorps %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_undef_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpsubsw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %res = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> undef, <8 x i16> %a0)
   ret <8 x i16> %res
diff --git a/llvm/test/CodeGen/X86/combine-sub-usat.ll b/llvm/test/CodeGen/X86/combine-sub-usat.ll
index f421249babd..03c6e8840a8 100644
--- a/llvm/test/CodeGen/X86/combine-sub-usat.ll
+++ b/llvm/test/CodeGen/X86/combine-sub-usat.ll
@@ -16,8 +16,6 @@ define i32 @combine_undef_i32(i32 %a0) {
 ; CHECK-LABEL: combine_undef_i32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    subl %eax, %edi
-; CHECK-NEXT:    cmovael %edi, %eax
 ; CHECK-NEXT:    retq
   %res = call i32 @llvm.usub.sat.i32(i32 %a0, i32 undef)
   ret i32 %res
@@ -26,12 +24,12 @@ define i32 @combine_undef_i32(i32 %a0) {
 define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) {
 ; SSE-LABEL: combine_undef_v8i16:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    psubusw %xmm0, %xmm0
+; SSE-NEXT:    xorps %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_undef_v8i16:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpsubusw %xmm0, %xmm0, %xmm0
+; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %res = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> undef, <8 x i16> %a0)
   ret <8 x i16> %res