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| author | Craig Topper <craig.topper@intel.com> | 2019-04-03 23:28:30 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-04-03 23:28:30 +0000 |
| commit | 52cac4b79f97b1793ad06e503a5a62a24e06859c (patch) | |
| tree | 4ba1913eaa4322cf1bc5097dd0cc4e9daeeca50d /llvm/test/CodeGen/X86 | |
| parent | 477008bd5034a54cb7bddd0e635c19fdffaa524c (diff) | |
| download | bcm5719-llvm-52cac4b79f97b1793ad06e503a5a62a24e06859c.tar.gz bcm5719-llvm-52cac4b79f97b1793ad06e503a5a62a24e06859c.zip | |
[X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead.
This custom inserter existed so we could do a weird thing where we pretended that the instructions support
a full address mode instead of taking a pointer in EAX/RAX. I think was largely so we could be pointer
size agnostic in the isel pattern.
To make this work we would then put the address into an LEA into EAX/RAX in front of the instruction after
isel. But the LEA is overkill when we just have a base pointer. So we end up using the LEA as a slower MOV
instruction.
With this change we now just do custom selection during isel instead and just assign the incoming address
of the intrinsic into EAX/RAX based on its size. After the intrinsic is selected, we can let isel take
care of selecting an LEA or other operation to do any address computation needed in this basic block.
I've also split the instruction into a 32-bit mode version and a 64-bit mode version so the implicit
use is properly sized based on the pointer. Without this we get comments in the assembly output about
killing eax and defing rax or vice versa depending on whether we define the instruction to use EAX/RAX.
llvm-svn: 357652
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/apm.ll | 9 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/clzero.ll | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/mwaitx.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll | 7 |
4 files changed, 10 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/X86/apm.ll b/llvm/test/CodeGen/X86/apm.ll index 859f33ad357..38866c7cd45 100644 --- a/llvm/test/CodeGen/X86/apm.ll +++ b/llvm/test/CodeGen/X86/apm.ll @@ -8,23 +8,22 @@ define void @foo(i8* %P, i32 %E, i32 %H) nounwind { ; X86-LABEL: foo: ; X86: # %bb.0: # %entry -; X86-NEXT: movl {{[0-9]+}}(%esp), %edx -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: leal (%eax), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: monitor ; X86-NEXT: retl ; ; X64-LABEL: foo: ; X64: # %bb.0: # %entry ; X64-NEXT: movl %esi, %ecx -; X64-NEXT: leaq (%rdi), %rax +; X64-NEXT: movq %rdi, %rax ; X64-NEXT: monitor ; X64-NEXT: retq ; ; WIN64-LABEL: foo: ; WIN64: # %bb.0: # %entry -; WIN64-NEXT: leaq (%rcx), %rax +; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movl %edx, %ecx ; WIN64-NEXT: movl %r8d, %edx ; WIN64-NEXT: monitor diff --git a/llvm/test/CodeGen/X86/clzero.ll b/llvm/test/CodeGen/X86/clzero.ll index d08470dda92..a185cb7d05b 100644 --- a/llvm/test/CodeGen/X86/clzero.ll +++ b/llvm/test/CodeGen/X86/clzero.ll @@ -5,14 +5,13 @@ define void @foo(i8* %p) #0 { ; X64-LABEL: foo: ; X64: # %bb.0: # %entry -; X64-NEXT: leaq (%rdi), %rax +; X64-NEXT: movq %rdi, %rax ; X64-NEXT: clzero ; X64-NEXT: retq ; ; X32-LABEL: foo: ; X32: # %bb.0: # %entry ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: leal (%eax), %eax ; X32-NEXT: clzero ; X32-NEXT: retl entry: diff --git a/llvm/test/CodeGen/X86/mwaitx.ll b/llvm/test/CodeGen/X86/mwaitx.ll index 4895297966d..202a360ff2c 100644 --- a/llvm/test/CodeGen/X86/mwaitx.ll +++ b/llvm/test/CodeGen/X86/mwaitx.ll @@ -8,13 +8,13 @@ define void @foo(i8* %P, i32 %E, i32 %H) nounwind { ; CHECK-LABEL: foo: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %esi, %ecx -; CHECK-NEXT: leaq (%rdi), %rax +; CHECK-NEXT: movq %rdi, %rax ; CHECK-NEXT: monitorx ; CHECK-NEXT: retq ; ; WIN64-LABEL: foo: ; WIN64: # %bb.0: # %entry -; WIN64-NEXT: leaq (%rcx), %rax +; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movl %edx, %ecx ; WIN64-NEXT: movl %r8d, %edx ; WIN64-NEXT: monitorx diff --git a/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll index dfeb3cf378e..7124712ae49 100644 --- a/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll @@ -134,17 +134,16 @@ declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly define void @monitor(i8* %P, i32 %E, i32 %H) nounwind { ; X86-LABEL: monitor: ; X86: ## %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x0c] -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] -; X86-NEXT: leal (%eax), %eax ## encoding: [0x8d,0x00] +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x0c] ; X86-NEXT: monitor ## encoding: [0x0f,0x01,0xc8] ; X86-NEXT: retl ## encoding: [0xc3] ; ; X64-LABEL: monitor: ; X64: ## %bb.0: ; X64-NEXT: movl %esi, %ecx ## encoding: [0x89,0xf1] -; X64-NEXT: leaq (%rdi), %rax ## encoding: [0x48,0x8d,0x07] +; X64-NEXT: movq %rdi, %rax ## encoding: [0x48,0x89,0xf8] ; X64-NEXT: monitor ## encoding: [0x0f,0x01,0xc8] ; X64-NEXT: retq ## encoding: [0xc3] tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H) |

