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| author | Igor Breger <igor.breger@intel.com> | 2017-04-07 14:41:59 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2017-04-07 14:41:59 +0000 |
| commit | 2953788c36e7fe37a0b6d5f24834a22eff5f889b (patch) | |
| tree | 0d7888458cef7e65352b5ef9c94ff3e0104dd33b /llvm/test/CodeGen/X86 | |
| parent | 138ad6c9c005af27727432d89e690e1bbe40b5ad (diff) | |
| download | bcm5719-llvm-2953788c36e7fe37a0b6d5f24834a22eff5f889b.tar.gz bcm5719-llvm-2953788c36e7fe37a0b6d5f24834a22eff5f889b.zip | |
[GlobalISel] implement narrowing for G_CONSTANT.
Summary: [GlobalISel] implement narrowing for G_CONSTANT.
Reviewers: bogner, zvi, t.p.northover
Reviewed By: t.p.northover
Subscribers: llvm-commits, dberris, rovka, kristof.beyls
Differential Revision: https://reviews.llvm.org/D31744
llvm-svn: 299772
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/legalize-const.mir | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-const.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-const.mir new file mode 100644 index 00000000000..612d33a77fc --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-const.mir @@ -0,0 +1,43 @@ +# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32 +# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64 + +--- | + define void @constInt_check() { + ret void + } + +... +--- +name: constInt_check +# ALL-LABEL: name: constInt_check +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } +body: | + bb.1 (%ir-block.0): + ; ALL: %5(s8) = G_CONSTANT i8 -1 + ; ALL: %0(s1) = G_TRUNC %5(s8) + %0(s1) = G_CONSTANT i1 1 + + ; ALL: %1(s8) = G_CONSTANT i8 8 + %1(s8) = G_CONSTANT i8 8 + + ; ALL: %2(s16) = G_CONSTANT i16 16 + %2(s16) = G_CONSTANT i16 16 + + ; ALL: %3(s32) = G_CONSTANT i32 32 + %3(s32) = G_CONSTANT i32 32 + + ; X64: %4(s64) = G_CONSTANT i64 64 + + ; X32: %6(s32) = G_CONSTANT i32 64 + ; X32: %7(s32) = G_CONSTANT i32 0 + ; X32: %4(s64) = G_MERGE_VALUES %6(s32), %7(s32) + %4(s64) = G_CONSTANT i64 64 + + RET 0 +... + |
