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| author | Valery Pykhtin <Valery.Pykhtin@amd.com> | 2019-01-09 13:43:32 +0000 |
|---|---|---|
| committer | Valery Pykhtin <Valery.Pykhtin@amd.com> | 2019-01-09 13:43:32 +0000 |
| commit | 1e0b5c719b868448e11930c1b4c9f6091b083b5b (patch) | |
| tree | ab2848bf053d0102fa610eb4d650375b5fc8c026 /llvm/test/CodeGen/X86 | |
| parent | 0b097b1a8a99728cdd62278d7c873fc535ae23b9 (diff) | |
| download | bcm5719-llvm-1e0b5c719b868448e11930c1b4c9f6091b083b5b.tar.gz bcm5719-llvm-1e0b5c719b868448e11930c1b4c9f6091b083b5b.zip | |
[AMDGPU] Fix DPP combiner
Fixed issue with identity values and other cases, f32/f16 identity values to be added later. fma/mac instructions is disabled for now.
Test is fully reworked, added comments. Other fixes:
1. dpp move with uses and old reg initializer should be in the same BB.
2. bound_ctrl:0 is only considered when bank_mask and row_mask are fully enabled (0xF). Othervise the old register value is checked for identity.
3. Added add, subrev, and, or instructions to the old folding function.
4. Kill flag is cleared for the src0 (DPP register) as it may be copied into more than one user.
Differential revision: https://reviews.llvm.org/D55444
llvm-svn: 350721
Diffstat (limited to 'llvm/test/CodeGen/X86')
0 files changed, 0 insertions, 0 deletions
