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authorNadav Rotem <nadav.rotem@intel.com>2012-07-12 13:45:15 +0000
committerNadav Rotem <nadav.rotem@intel.com>2012-07-12 13:45:15 +0000
commitfdce33a49589a5b5cbfad2100a17f19e334fe86f (patch)
tree4769584388e70391bd718db1c04f13b5e938f953 /llvm/test/CodeGen/X86/xor.ll
parentc6c28ff8e62ef9d54c3b66d7dd5a5bdc3d339f91 (diff)
downloadbcm5719-llvm-fdce33a49589a5b5cbfad2100a17f19e334fe86f.tar.gz
bcm5719-llvm-fdce33a49589a5b5cbfad2100a17f19e334fe86f.zip
The LIT tests below do not specify the exact cpu model and fail on AVX2 machines, because we select different instructions such as vbroadcast, new shuffles, etc.
Patch by Michael Liao. llvm-svn: 160129
Diffstat (limited to 'llvm/test/CodeGen/X86/xor.ll')
-rw-r--r--llvm/test/CodeGen/X86/xor.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/xor.ll b/llvm/test/CodeGen/X86/xor.ll
index ddc4cab14a4..73416eff0e6 100644
--- a/llvm/test/CodeGen/X86/xor.ll
+++ b/llvm/test/CodeGen/X86/xor.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
; Though it is undefined, we want xor undef,undef to produce zero.
define <4 x i32> @test1() nounwind {
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