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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-19 00:25:39 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-19 00:25:39 +0000
commit9cac4e6d1403554b06ec2fc9d834087b1234b695 (patch)
tree9958cd3309f50e57290362076df149ac5c442705 /llvm/test/CodeGen/X86/xor-combine-debugloc.ll
parent1885747498c2730e47fee42a0c59492d09f4352f (diff)
downloadbcm5719-llvm-9cac4e6d1403554b06ec2fc9d834087b1234b695.tar.gz
bcm5719-llvm-9cac4e6d1403554b06ec2fc9d834087b1234b695.zip
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
This allows targets to make more decisions about reserved registers after isel. For example, now it should be certain there are calls or stack objects in the frame or not, which could have been introduced by legalization. Patch by Matthias Braun llvm-svn: 363757
Diffstat (limited to 'llvm/test/CodeGen/X86/xor-combine-debugloc.ll')
-rw-r--r--llvm/test/CodeGen/X86/xor-combine-debugloc.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/xor-combine-debugloc.ll b/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
index 3978378d557..ab4fba703bb 100644
--- a/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
+++ b/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=expand-isel-pseudos < %s | FileCheck %s
+; RUN: llc -stop-after=finalize-isel < %s | FileCheck %s
;
; Make sure that when the entry block of IR below is lowered, an instruction
; that implictly defines $eflags has a same debug location with the icmp
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