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| author | Preston Gurd <preston.gurd@intel.com> | 2012-07-18 20:49:17 +0000 |
|---|---|---|
| committer | Preston Gurd <preston.gurd@intel.com> | 2012-07-18 20:49:17 +0000 |
| commit | f0a48ec8f188d3c2ccb86cce027e3b3b7a231d8b (patch) | |
| tree | def831713c8193e6cf1521598e35b610f7c1b7a1 /llvm/test/CodeGen/X86/vshift-2.ll | |
| parent | 5e0c5e8108e8886e4aa7ea489d0af5bc4f521a25 (diff) | |
| download | bcm5719-llvm-f0a48ec8f188d3c2ccb86cce027e3b3b7a231d8b.tar.gz bcm5719-llvm-f0a48ec8f188d3c2ccb86cce027e3b3b7a231d8b.zip | |
This patch fixes 8 out of 20 unexpected failures in "make check"
when run on an Intel Atom processor. The failures have arisen due
to changes elsewhere in the trunk over the past 8 weeks or so.
These failures were not detected by the Atom buildbot because the
CPU on the Atom buildbot was not being detected as an Atom CPU.
The fix for this problem is in Host.cpp and X86Subtarget.cpp, but
shall remain commented out until the current set of Atom test failures
are fixed.
Patch by Andy Zhang and Tyler Nowicki!
llvm-svn: 160451
Diffstat (limited to 'llvm/test/CodeGen/X86/vshift-2.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vshift-2.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/vshift-2.ll b/llvm/test/CodeGen/X86/vshift-2.ll index 9a9b419abea..9496893bd1a 100644 --- a/llvm/test/CodeGen/X86/vshift-2.ll +++ b/llvm/test/CodeGen/X86/vshift-2.ll @@ -16,7 +16,7 @@ define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: ; CHECK: shift1b: ; CHECK: movd -; CHECK-NEXT: psrlq +; CHECK: psrlq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1 %lshr = lshr <2 x i64> %val, %1 @@ -37,7 +37,7 @@ define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: ; CHECK: shift2b: ; CHECK: movd -; CHECK-NEXT: psrld +; CHECK: psrld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2 @@ -63,7 +63,7 @@ entry: ; CHECK: shift3b: ; CHECK: movzwl ; CHECK: movd -; CHECK-NEXT: psrlw +; CHECK: psrlw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 |
